Analog Devices International Unlimited Company

Analog Devices,inc.

Linear Technology Corporation

Raymond Thomas Perry

George Reitsma

Michael C W Coln

Jesper Steensgaard-Madsen

Quan Wan

Andreas Koch

David James Plourde

Kalin V Lazarov

James Raymond Catt

Karthik Pappu

Paul A Perrault

George Pieter Reitsma

An analog-to-digital (ADC) converter system and method of using the system that can be used in low power situations. The converter can periodically or recurrently turn off a reference standard in order to conserve power and instead using a stable supply source as a reference voltage. A precise conversion for signal from the analog to the digital domain while maintaining a low quiescent current.

ADC with precision reference power saving mode

A system for processing a signal in a signal chain having decentralized embedded power management of components of the signal chain includes an input circuit to generate a measurement signal responsive to a stimulus, where the measurement signal is indicative of a characteristic of the stimulus. The system additionally includes a signal converter circuit coupled to the input circuit to convert the measurement signal to a digital signal according to a timing condition for capturing a sample of the measurement signal. The signal converter includes a control circuit to provide electrical power to the input circuit based on the timing condition and a sampling circuit to capture the sample of the measurement signal responsive to an indicator signal generated by the sensor circuit.

Signal chain with embedded power management

Techniques to reduce the on-time of a multi-stage ADC circuit by combining the settling time of a signal conditioning circuit, e.g., buffer circuit, and the setting time of a residue amplifier when cancelling the offset of the signal conditioning circuit. The techniques can allow the signal conditioning circuit and the residue amplifier to settle together.

Time-efficient offset cancellation for multi-stage converters

In one embodiment, an A/D converter samples an analog input signal voltage by applying the input signal to a first capacitor terminal, while a second capacitor terminal is connected to ground via an NMOS sampling switch, to charge the capacitor to the input signal voltage. During an analog-to-digital conversion process, the second capacitor terminal may swing in a voltage range that extends below ground. A controller circuit provides bias voltage signals to a gate terminal and to a p-well of the NMOS sampling switch, to selectively turn the sampling switch on and off. In a first step of a multi-step sampling process, the controller very quickly discharges the gate terminal to ground to isolate a quantity of charge on the second capacitor plate. In a subsequent step of the sampling process, the controller circuit applies a negative voltage to the gate terminal and p-well to ensure that the quantity of change is substantially preserved during the ensuing analog-to-digital conversion process.

Sampling switch and controller

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South San Francisco, CA, United States of America

Raymond Thomas Perry