International Business Machines Corporation

Raymond Leslie Hicks

Alongkorn Kitamorn

David Otto Lewis

Douglas Craig Bossen

Sheldon Ray Bailey

Thomas A Liebsch

Daniel James Henderson

Wayne L Lemmon

Douglas Ray Gilbert

A method, apparatus and computer program product are provided for implementing uncorrectable error isolation in a computer system while the system continues to run. A memory controller performs data fetching from a system memory, capturing error information, and responsive to detecting an uncorrectable error, generates a predefined attention to a service processor. The service processor utilizing a processor runtime diagnostic (PRD) program, reads the captured error data and identifies a memory extent with the uncorrectable error. Then the memory controller performs accelerated scrubbing of the identified memory extent with the uncorrectable error, capturing error information and responsive to a scrub correctable error threshold being exceeded, sends a predefined scrub threshold exceeded attention to the service processor. The service processor reads the captured error data and identifies a failed memory chip.

Method and apparatus for isolating uncorrectable errors while system continues to run

An apparatus and method of repairing a processor array for a failure detected at runtime in a system supporting persistent component deallocation are provided. The apparatus and method of the present invention allow redundant array bits to be used for recoverable faults detected in arrays during run time, instead of only at system boot, while still maintaining the dynamic and persistent processor deallocation features of the computing system. With the apparatus and method of the present invention, a failure of a cache array is detected and a determination is made as to whether a repairable failure threshold is exceeded during runtime. If this threshold is exceeded, a determination is made as to whether cache array redundancy may be applied to correct the failure, i.e. a bit error. If so, the cache array redundancy is applied without marking the processor as unavailable. At some time later, the system undergoes a re-initial program load (re-IPL) at which time it is determined whether a second failure of the processor occurs. If a second failure occurs, a determination is made as to whether any status bits are set for arrays other than the cache array that experienced the present failure, if so, the processor is marked unavailable. If not, a determination is made as to whether cache redundancy can be applied to correct the failure. If so, the failure is corrected using the cache redundancy. If not, the processor is marked unavailable.

Apparatus and method of repairing a processor array for a failure detected at runtime

A method and system for managing uncorrectable data error (UE) conditions as the UE passes through a plurality of devices in a central electronic complex (CEC) is disclosed. The method and system comprises detecting a UE-RE by at least one device in the CEC; and providing an attention signal by at least one device to a diagnostic system to indicate the UE-RE condition. The method and system further includes analyzing the UE-RE attention signal by the diagnostic system to produce an error log with a list of failing parts and a record of the log. A method and system in accordance with the present invention provides a new fault isolation methodology and algorithm, which extends the current capability of a service processor runtime diagnostic code (PRD). The method and system in accordance with the present invention allows for correct error isolation and for surfacing of appropriate service action messages on a processing system that has successfully recovered from an uncorrectable data error (UE) condition. The method allows for the accurate determination of an error source and provides appropriate service action if and when the system fails to recover from the UE condition.

Method for managing an uncorrectable, unrecoverable data error (UE) as the UE passes through a plurality of devices in a central electronics complex

A method and system for managing uncorrectable data error conditions from an I/O subsystem as the UE passes through a plurality of devices in a central electronic complex (CEC) is disclosed. The method and system comprises detecting a I/O UE by at least one device in the CEC; and providing an SUE-RE (Special Uncorrectable Data Error-Recoverable Error) attention signal by at least one device to a diagnostic system that indicates the I/O UE condition. The method and system further includes analyzing the SUE-RE attention signal by the diagnostic system to produce an error log with a list of failing parts and a record of the log. A method and system in accordance with the present invention provides a new fault isolation methodology and algorithm, which extends the current capability of a service processor runtime diagnostic code (PRD). The method allows for the accurate determination of an error source and provides appropriate service action if and when the system fails to recover from the UE condition. This new methodology allows a more focused determination of error source and appropriate service action if and when the system fails to recover from an I/O UE.

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Rochester, MN, United States of America

Raymond Leslie Hicks