Koninklijke Philips Corporation N.v.

Nxp B.v.

U.S. Philips Corporation

Raymond J E Hueting

Erwin Hijzen

Michael A A In'T Zandt

Jan Willem Slotboom

Anco Heringa

Godefridus A M Hurkx

Adam R Brown

Petrus H C Magnee

Rob Van Dalen

Abraham Rudolf Balkenende

Andreas Hubertus Montree

Cornelis Eustatius Timmering

Erwin A Hijzen

Eddie Huang

Henricus G R Maas

Michael A A In 't Zandt

Gerrit E J Koops

Miron Drobnis

Jurriaan Schmitz

Erik P A M Bakkers

Martin J Hill

Mark Gajda

Holger Schligtenhorst

Stephen W Hodgskiss

Michael A A Zand In't

Mark A Gajda

Prabhat Agarwal

Michael A A In 'T Zandt

A semiconductor device includes a semiconductor region having a pn junction and a field shaping region located adjacent the pn junction to increase the reverse breakdown voltage of the device. The field shaping region is coupled via capacitive voltage coupling regions to substantially the same voltages as are applied to the pn junction. When a reverse voltage is applied across the pn junction and the device is non-conducting, a capacitive electric field is present in a part of the field shaping region which extends beyond a limit of the pn junction depletion region which would exist in the absence of the field shaping region. The electric field in the field shaping region inducing a stretched electric field limited to a correspondingly stretched pn junction depletion region in the semiconductor region.

Semiconductor devices with a field shaping region

A trench MOSFET with drain (), drift region () body () and source (). In order to improve the figure of merit for use of the MOSFET as control and sync FETs, the trench () is partially filled with dielectric () adjacent to the drift region () and a graded doping profile is used in the drift region ().

Trench MOSFET

A field-effect transistor having cells () each having a source region (), source body region (), drift region (), drain body region () and drain region () arranged longitudinally, laterally alternating with structures to achieve a reduced surface field. In embodiments, the structures can include longitudinally spaced insulated gate trenches () defining a gate region () adjacent the source or drain region () and a longitudinally extending potential plate region () adjacent the drift region (). Alternatively, a separate potential plate region () or a longitudinally extending semi-insulating field plate () may be provided adjacent the drift region (). The transistor is suitable for bi-directional switching.

Lateral field-effect transistor having an insulated trench gate electrode

A semiconductor device has a trench () adjacent to a cell (). The cell includes source and drain contact regions (), and a central body () of opposite conductivity type. The device is bidirectional and controls current in either direction with a relatively low on-resistance. Preferred embodiments include potential plates () that act together with source and drain drift regions () to create a RESURF effect.

Trench MOS structure

Semiconductor devices may be fabricated using nanowires. In an example embodiment, a conductive gate may be used to control conduction along the nanowires, in which case one of the contacts is a drain and the other a source. The nanowires may be grown in a trench or through-hole in a substrate or in particular in an epitaxial layer on substrate. In another example embodiment, the gate may be provided only at one end of the nanowires. The nanowires can be of the same material along their length; alternatively different materials can be used, especially different materials adjacent to the gate and between the gate and the base of the trench.

Nanowire semiconductor device

A semiconductor device, for example a diode (), having a pn junction () has an insulating material field shaping region () adjacent, and possibly bridging, the pn junction. The field shaping region () preferably has a high dielectric constant and is coupled via capacitive voltage coupling regions () to substantially the same voltages as are applied to the pn junction. When a reverse voltage is applied across the pn junction () and the device is non-conducting, a capacitive electric field, is present in a part of the field shaping region which extends beyond a limit of the pn junction depletion region which would exist in the absence of the field shaping region (), the electric field in the field shaping region inducing a stretched electric field limited to a correspondingly stretched pn junction depletion region () and an increased reverse breakdown voltage of the device.

The invention relates to a trench MOSFET with drain (), sub-channel region () body () and source (). The sub-channel region is doped to be the same conductivity type as the body (), but of lower doping density. A field plate electrode () is provided adjacent to the sub-channel region ()and a gate electrode () next to the body ().

Trench insulated gate field effect transistor

A vertical insulated gate transistor is manufactured by providing a trench () extending through a source layer () and a channel layer () towards a drain layer (). A spacer etch is used to form gate portions () along the trench side walls, a dielectric material () is filled into the trench between the sidewalls gate portions (), and a gate electrical connection layer () is formed at the top of the trench electrically connecting the gate portions () across the trench.

Vertical insulated gate transistor and manufacturing method

A trench-gate semiconductor device () has a trench network (STR, ITR) surrounding a plurality of closed transistor cells (TCS). The trench network comprises segment trench regions (STR) adjacent sides of the transistor cells (TCS) and intersection trench regions (ITR) adjacent corners of the transistor cells. As shown in FIG.which is a section view along the line II-II of FIG., the intersection trench regions (ITR) each include insulating material (D) which extends from the bottom of the intersection trench region with a thickness which is greater than the thickness of the insulating material (B) at the bottom of the segment trench regions (STR). The greater thickness of the insulating material (D) extending from the bottom of the intersection trench regions (ITR) is effective to increase the drain-source reverse breakdown voltage of the device (). The insulating material (D) which extends from the bottom of each intersection trench region (ITR) may extend upwards to thicken the insulating material at the corners of the cells (TCS) over at least part of the vertical extent of the channel-accommodating body region () so as to increase the threshold voltage of the device.

Insulated gate power semiconductor devices

A method of making a trench MOSFET includes forming a nitride lineron the sidewallsof a trench and a plug of doped polysiliconat the bottom of a trench. The plug of polysiliconmay then be oxidised to form a thick oxide plugat the bottom of the trench whilst the nitride linerprotects the sidewallsfrom oxidation. This forms a thick oxide plug at the bottom of the trench thereby reducing capacitance between gate and drain.

Method of maufacturing a trench-gate semiconductor device

A RESURF trench gate MOSFET has a sufficiently small pitch (close spacing of neighbouring trenches) that intermediate areas of the drain drift region are depleted in the blocking condition of the MOSFET. However, premature breakdown can still occur in this known device structure at the perimeter/edge of the active device area and/or adjacent the gate bondpad. To counter premature breakdown, the invention adopts two principles: These principles can be implemented in various cellular layouts e.g. a concentric annular device geometry, which may be circular or rectangular or ellipsoidal, in the active area and in the edge termination, or a device array of such concentric hexagonal or circular stripe cells, or a device array of square active cells with stripe edge cells, or a device array of hexagonal active cells with an edge termination of hexagonal edge cells.

Edge termination in MOS transistors

In semiconductor devices which include an insulated trench electrode () in a trench (), for example, trench-gate field effect power transistors and trenched Schottky diodes, a cavity () is provided between the bottom () of the trench electrode () and the bottom () of the trench () to reduce the dielectric coupling between the trench electrode () and the body portion at the bottom () of the trench in a compact manner. In power transistors, the reduction in dielectric coupling reduces switching power losses, and in Schottky diodes, it enables the trench width to be reduced.

Trenched semiconductor devices and their manufacture

To avoid premature breakdown at the edge of the active area of RESURF trench-gate MOS device, an edge field plate ( ) can be placed with a connection to the gate and a second spaced field plate ( ) in the same trench ( ). The gate trench network ( ) could be either formed by hexagon unit cells or by square unit cells. Since the RESURF condition requires a small cell pitch, self-aligned processing could be used.

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Helmond, Netherlands

Raymond J E Hueting