Alcatel Network Systems, Inc.

Alcatel Na, Inc.,

Alcatel Lucent

Raymond E. Tyrrell

M. Rodney Briscoe

Joseph E. Sutherland

Claude M. Hurlocker

Stephen C. Dunning

Jeffrey P. Jones

Richard J., Jr. Sanders

Michael J. Gingell

Manal E. Afify

Raymond E Tyrrell

Joseph E Sutherland

Michael J Gingell

Claude M Hurlocker

Dale L Krisher

Richard J Sanders, Jr

Stephen C Dunning

Milton R Briscoe

Jeffrey P Jones

Richard Marion Czerwiec

William B Weeber

Timothy J Williams

Joseph Lee Smith

William E Powell

Collins Williams

Ertugrul Baydar

William J Fox

Manal E Afify

William H Stephenson, Jr

Richard W Peters

Gus C Sanders, Jr

Francis G Noser

Sahabettin C Demiray

Hal A Thorne

Jak Yaemsiri

David Hansen

Keith L Bernhardt

Michael Sutton

Camille A Abu-Saba

Wenkwei Rou

Dana Merrill

O Lamar Bishop

Mohammad S Arani

Victor W Wilkerson

Patrick M Farrell

Heinrich T Sonnenberg

V Paul Runyon

Kenneth J Stoia

M Rodney Briscoe

John P Mathew

Jr Sanders Richard J

A system, method and computer readable medium comprising instructions for sending a message from an Optical Network Terminal (ONT) to an Optical Line Terminal (OLT), if the ONT does not receive an expected OLT action or an expected OLT response to the message within a period, considering the non-receipt of the expected OLT action or the expected OLT response a failure, and if a certain number of consecutive failures have occurred, considering by the ONT that it has entered an uncontrolled state.

Automatic ONT self disabling system, method, and computer readable medium

Redundant facility payload signals (12, 14) received by redundant interface modules (16, 18) are redundantly provided (28, 30; 32, 34) to redundant downstream modules (24, 26) in an equipment (10). A non-symmetrical facility protection algorithm is resident in the B interface module (18). Symmetrical equipment protection algorithms are independently resident and operative in each module of pairs of identical A and B modules at each stage of the data stream. Module or data failures result in switchover only of the disabled data path or module so that the ability to transport payload is maintained and other modules or data paths are unaffected. Facility switchover is effected by detecting a working line failure and transmitting commands to switch the protection line to the A path modules. Equipment switchover is effected by checking for a working or protection module failure independently in each path and independently communicating independent switchover decisions to the other side and downstream. The methodology and mechanism are disclosed in a SONET element embodiment, although the invention is applicable in other contexts.

Distributed control methodology and mechanism for implementing automatic

A synchronous optical transmission system for interfacing SONET formatted channels to lower speed channels in either a SONET format or otherwise. The transmission system incorporates a fiber transmission system, terminal multiplexers and add/drop multiplexers that in turn incorporate a plurality of features, such as parallel scrambling circuitry, frame synchronization circuitry and the like.

Synchronous optical transmission system

A serial transport frame format is described which transfers data between two locations. The serial transport frame format comprises a fixed number of channels per frame, each channel having a predetermined size. One channel per frame contains frame synchronization information and each channel which conveys data, contains a first portion for the transfer of data and a second portion which contains associated control information.

Serial transport frame format method

A transfer strobe delay stage selector insures accurate transfer of data from high speed circuitry to low speed circuitry through use of a delay stage module comprising a plurality of delay stages, and an associated multiplexor for selecting one of the delay stages so as to provide accurate reception of parallel data by the low speed circuitry from the high speed circuitry. The transfer strobe delay stage selector incorporates a synchronization channel identification module for detecting synchronization channel information in the frames of data transferred from the high speed circuitry to the low speed circuitry and also includes control circuitry for adjusting the selected delay stage until synchronization channel identification is detected. A second embodiment of the invention provides an auxiliary synchronization channel identification module and associated control circuitry to dynamically adjust the selected delay stage when variation in the propagation delay between the high speed and low speed circuitry occurs.

Transfer strobe time delay selector and method for performing same

A parallel time slot interchanger, particularly for use in telecommunication switching, comprises a plurality of switch groups, with each switch group containing a second plurality of channels. The parallel time slot interchanger incroporated a matrix-type architecture, with each module of the matrix comprising a switch block which in turn incorporates a switch memory, connect memory and associated control circuitry. The connect memory of each switch block is controlled by the control circuitry of that block. The data stored in the connect memory contains switch memory address information for reading channel data stored within the switch memory of the same switch block so as to be able to perform a time slot switching function during any given time slot of the parallel time slot interchanger. Each switch block is uniquely identified within its corresponding switch group so that only one switch memory address location is read and output during any time slot for each switch group.

Parallel time slot interchanger matrix and switch block module for use

A low speed channel bypass apparatus is described for reprovisioning the time slot multiplexer associated with an add/drop multiplexer so as to insure that particular low speed channel(s) within a high speed channel are passed through the add/drop multiplexer via the time slot multiplexer when the operation of an associated network controller is determined to be faulty. The low speed channel bypass apparatus is particularly directed for use with a high speed channel conforming to the synchronous optical network communication standard (SONET). A watchdog timer is used to monitor the performance of the network controller. The watchdog timer when timed out not only prevents further operation of the network controller, but instructs an associated reprovisioning apparatus to instruct the time slot multiplexer to connect through selected channel(s) from the east high speed interface to the west high speed interface.

Data communication bypass apparatus and method

Real-time conversion between two different A/B signal coding schemes based on the DS1 time division multiplex format is achieved by time sharing a programmable state machine. The time sharing is accomplished synchronously with the DS1 superframe such that each of the 24 DS1 channels have signalling translated once every superframe. Programmability of the state machine is facilitated by the use of an EPROM. A RAM is used for real-time storage of signal states, machine states and processor provisioning for each channel, thereby facilitating time sharing of the state machines. Flexibility is provided through the unique use of an EPROM, which can be modified to directly change the signalling translation response depending on the type of telephony service being provided and the coding scheme used for the signalling. Processor provisioning of the RAM selects a service type translation for each of the 24 DS1 channels.

Multi-task state machine signalling translator

Growing community of inventors

Wake Forest, NC, United States of America

Raymond E Tyrrell