International Business Machines Corporation

Raymond A Schulz

Barry R Cavill

Yogi K Puri

A BiCMOS NAND circuit is disclosed employing low threshold n-channel FET transistors in conjunction with standard threshold n-channel FET transistors and standard threshold p-channel FET transistors. Circuit performance is maintained as the circuit devices are scaled to physically smaller FET devices and reduced power supply voltage. Furthermore, the circuit is interface compatible with standard CMOS circuits.

Low threshold BiCMOS circuit

A very large scale integrated (VLSI) compatible, random number generator which is highly invulnerable to cryptographic attack. The invulnerability to cryptographic attack is based upon a low frequency sampling of the output of a pseudo-random number generator which is operated at a varying frequency from a free-running ring oscillator. In a first embodiment, a free-running ring oscillator is used to drive a sampled linear feedback shift register. The asynchronous, serial pseudo-random number output from the linear feedback shift register is sampled periodically, thereby introducing randomly occurring deviations from the pseudo-random number sequence. A variation of the free-running ring oscillator is employed as the pseudo-random number generator, by introducing into the feedback loop of the ring oscillator, an exclusive OR circuit which is connected so that the ring oscillator thereby produces a serial, pseudo-random number sequence. Additional uncertainty in the sequence of random numbers produced by the free-running pseudo-random number generator, is caused by the race condition which occurs at the inputs to the exclusive OR connected in the circuit.

Random number generator circuit

A print head motor control system for a printer having a bidirectionally movable print head employs a microcomputer to automatically calculate print head motor parameters which are utilized to generate a motor drive voltage value for any desired print head speed. Upon powering-up of the printer, the print head is driven until contact with the left sideframe is made. A full pass from left to right is then made checking for obstructions. The print head motor is driven at a first default drive voltage value, which is assumed to drive the print head at a first preselected velocity while the first actual print head velocity is measured. The printhead motor is then driven at a second default drive voltage value, which is assumed to drive the print head at a second preselected velocity while the second actual print head velocity is measured. The first default value, first actual print head velocity, second default value and second actual print head velocity are then used to derive a voltage vs. velocity constant and a frictional value which are used to calculate the appropriate drive voltage value for any given desired print head velocity.

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Manassas, VA, United States of America

Raymond A Schulz