Nvidia Corporation

Unicap Electronics Industrial Corporation

Ray Chen

Behdad Jafari

Inderjit Singh

Paul Y Wu

Orion K Starr

Scott Chen

Jeff Chang

Jane Lu

An integrated circuit/substrate interconnect apparatus and method are provided. Included is an integrated circuit including a plurality of bond pads, and a substrate including a plurality of landing pads and a mask. Such mask is spaced from the landing pads for defining areas therebetween. Further provided is a plurality of interconnects connected between the bond pads of the integrated circuit and the landing pads of the substrate. The interconnects include metal projections extending from the bond pads and a solder material for connecting the metal projections and the landing pads of the substrate.

Integrated circuit/substrate interconnect system and method of manufacture

An integrated circuit/substrate interconnect apparatus and method of manufacture are provided. Included is a substrate with a plurality of wells and a landing pad formed in each of the wells. The substrate further includes a seed layer deposited in each of the wells over the landing pad, and a metalized layer deposited in each of the wells over the seed layer. Before assembly, an upper surface of the metalized layer forms a well.

System and method of manufacture for interconnecting an integrated circuit and a substrate

An integrated circuit package is disclosed. The integrated circuit package includes a package substrate having a top and a bottom. Further, the integrated circuit package includes a plurality of bypass capacitors coupled to the bottom of the package substrate without a cavity. Moreover, the integrated circuit package includes an array of solder balls formed on the bottom of the package substrate. The array of solder balls facilitates surface mounting to a printed circuit board assembly. Also, the solder balls provide sufficient space between the printed circuit board assembly and the bypass capacitors. In an embodiment, the package substrate is an organic substrate.

Integrated circuit package having bypass capacitors coupled to bottom of package substrate and supporting surface mounting technology

A method of making a thermally enhanced BGA substrate in which a metal (copper) core, has dielectric layers applied to each side thereof and conductive through-core build-up vias are provided. Rigidifying non-conductive dielectric sheets are laminated to the oppositely facing surfaces and then conductive layers are applied to at least one of the rigidifying non-conductive sheets and via connections are made through the dielectric layer(s) to the core conductive layer.

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Fremont, CA, United States of America

Ray Chen