National Semiconductor Corporation

Ravindra Ambatipudi

Dragan Maksimovic

Bruno Kranzen

Sandeep Dhar

Mark Hartman

There is disclosed a digital circuit comprising a digital processing component, an adjustable power supply and power supply adjustment circuitry. The digital processing component is capable of operating at a plurality of selected clock frequencies, wherein a maximum delay time of a critical path in the digital processing component is determined by a level of a power supply, VDD, of the digital processing component. The adjustable power supply is capable of supplying VDD to the digital processing component. The power supply adjustment circuitry is operable to receive a first selected clock signal and adjusts the level of VDD such that the maximum delay time of the critical path of the digital processing component is less than a pulse-width duration between a first clock edge of the first selected clock signal and a second clock edge of the first selected clock signal immediately following the first clock edge.

Adaptive voltage scaling digital processing component and method of operating the same

There is disclosed an adaptive voltage power supply that finely adjusts VDD to an optimum level. The adaptive voltage power supply comprises: 1) a first charging circuit capable of increasing a reference voltage on a charge capacitor in response to receipt of a first VDD control signal; 2) a second charging circuit capable of decreasing the reference voltage on the charge capacitor in response to receipt of a second VDD control signal; and 3) a power supply capable of receiving the reference voltage on the charge capacitor and generating an output power level, VDD, determined by a level of the reference voltage.

Adaptive voltage scaling power supply for use in a digital processing component and method of operating the same

A method and apparatus is arranged to produce high precision output voltage matching in a multiple output power converter. A two-output voltage converter includes a positive and a negative voltage output that are approximately equal in magnitude. The power converter includes inductors, transfer capacitance circuitry, and a controlled switching circuit. In one operating mode, the switching circuit is closed, the inductors are charged, and energy from the input signal is stored in the transfer capacitance circuitry. In a second operating mode, the switching circuit is opened, and the stored energy is transferred to the output loads. The transfer capacitance circuitry is arranged to provide improved matching in the output voltages. The two-output power converter topology may be extended to provide multiple outputs.

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Milpitas, CA, United States of America

Ravindra Ambatipudi