Applied Micro Circuits Corporation

Other

National Semiconductor Corporation

Ravi Subrahmanyan

Dimitrios Giannakopoulos

Jeffrey W Spires

Xingen James Ren

Xingen (James) Ren

Glen Miller

Nandakumar Vaidyanathan

Peter R Holloway

Venkat Sreenivas

Anthony B Candage

Mark L Seiders

Sanitha Dinasarapu

A system and method are provided for converting multichannel serial data streams into packets. The method accepts a plurality of serial data streams in a corresponding plurality of channels. In a time domain multiplexed (TDM) fashion, groups with an undetermined number of data bits are packed from each data stream, into an associated channel segment queue, where each segment includes a predetermined number of bits. In a TDM fashion, segments are loaded into an associated channel payload queue, where each payload includes a predetermined number of segments. Once a payload is filled, an associated pointer is created in a pointer queue. The method selects a pointer from the pointer queue, creates a packet from the payload associated with the selected pointer, and transmits the packet via a packet interface. The packet overhead may include information stored in the pointer, a packet header, or a cyclic redundancy check (CRC) checksum.

Multichannel data conversion into packets

A system and method are presented for providing packet and time division multiplex (TDM) services in a data communication interface. The method accepts packets at a first rate over a packet interface, and transfers time-sensitive data in the packets as packet data units (PDUs) having a smaller number of bits than a packet and a second rate, faster than the first rate. The method transforms the PDUs into frames in a first TDM protocol. Typically, the PDUs are transformed into units having a smaller number of bits than the PDU and a third rate, faster than the second rate. Then, the TDM frames are transmitted over a line interface.

System and method for packet and time division multiplexed transport

A system and method are provided for efficiently switching a loop bandwidth using stored values in a digital filter of a phase-locked loop system. In a first timeslice, an input signal is digitally filtered using base coefficients multiplied by stored filter output and input values from previous timeslices. The filter output value is used to acquire the input signal frequency in a first bandwidth. In response to changes in the input signal frequency, the input signal is digitally filtered in a predetermined number of first intermediate period timeslices using transient coefficients multiplied by stored filter output and input values from previous timeslices. As a result, the first filter output value is maintained within a predetermined range. In a second timeslice, the input signal is digitally filtered using base coefficients multiplied by stored filter output and input values from previous timeslices to acquire the input signal frequency in a second bandwidth.

System and method for filter response switching

Multiservice system and method for packet and time division multiplexed transport

A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H/Hor V/V) are maintained for all the SPEs.

Synchronous payload envelope mapping without pointer adjustments

System and method for converting multichannel time division multiplexed data into packets

System and method for synchronous payload envelope mapping without pointer adjustments

A system and method are provided for a sampled accumulation method that maps information into Synchronous Payload Envelopes (SPEs). The method buffers data from a plurality of tributaries, and sequentially stores buffer-fill information for each tributary in a first memory, at a rate of up to one tributary per system clock (Fsys) cycle. A stored accumulation of buffer-fill information for each tributary is updated at a sample rate frequency (Fsample), where Fsample&#x2266;Fsys. The stored accumulation of buffer-fill information is used to calculate stuff bit opportunities for each tributary. As a result, the rate of data being mapped into outgoing tributaries is regulated, and the outgoing mapped tributaries are combined in a SPE.

Sampled accumulation system and method for jitter attenuation

A timeshared data tributary mapping system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method buffers data from a plurality of tributaries and stores current buffer-fill information at a rate of about one tributary per Fsys clock cycle. An accumulation of buffer-fill information for the plurality of tributaries is updated with current buffer-fill information every Fsys clock cycle. The accumulation of buffer-fill information for the plurality of tributaries is sampled at a sample rate frequency (Fsample), where Fsample&#x3c;Fsys. The sampled buffer-fill information is used to calculate a data rate control word for each of the plurality of tributaries, and stuff bit opportunities are serially calculated responsive to the control word. The rate of data being mapped into outgoing tributaries is regulated, and the outgoing mapped tributaries are combined in a SPE.

Timeshared jitter attenuator in multi-channel mapping applications

A system and modulation method are provided for reducing jitter in the mapping of information into Synchronous Payload Envelopes (SPEs), in a data tributary mapping system. The method comprises buffering data from a plurality of tributaries, and generating buffer-fill information responsive to the buffered data being written and read. The buffer-fill information is filtered, producing rate control information. The rate control information is modulated, and the modulated rate control information is used in controlling the mapping of buffered tributaries into a SPE. The rate control information can be modulated with periodic signals, such as a sine or square wave, and pseudorandom signals with an average value of about zero.

Modulated jitter attenuation filter

The present invention is for an apparatus that receives input data at a non-uniform first data rate carried by a system clock, and provides output data at a substantially uniform second data rate that is nominally equal to the first data rate and is also carried by the system clock. The system clock is faster than the first or second data rates and accordingly, a write enable signal controls the input data that is written into a saturating elastic store and a read enable signal controls the reading and output of data from the saturating elastic store. The saturating elastic store includes a plurality of storage locations and provides a storage fill level indicative of the amount of storage locations currently holding data. A digital filter receives the storage fill level and filters the storage fill level to provide a control word to a digitally controlled read enable signal generator. The digitally controlled read enable signal generator provides a read enable signal that is nominally the second data rate and that can be varied about the nominal second data rate in response to the control word. The digitally controlled read enable signal generator is able to vary the read enable signal rate by providing a plurality of stuff bit opportunities interspersed between the read enable signals. Some of these stuff bit opportunities are filled to set the read enable signal rate at the nominal second data rate value. By filling or not filling the stuff bit opportunities, the read enable signal rate can be adjusted over a narrow band of frequencies.

Jitter and wander reduction apparatus

The print engine is composed of a semiconductor memory layer overlaid on an insulated conductive layer with a one to one correspondence of each memory cell with the conductive pad on the insulated layer. The entire structure can be fashioned into a either a planar structure or a cylindrical structure with insulated conductive pads providing protection to the sensitive semiconductor memory from impact loading that occurs during the printing process.

Digital semiconductor based printing system and method

A print engine suitable for printing barcodes and other patterns using charged inks includes a semiconductor memory layer having memory circuits that are coupled to one or more line elements and/or printel cells. The printel cells and line elements either attract or do not attract charged ink based on the data stored in the corresponding memory circuit. The line elements and printel cells may be configured to form a linear barcode or a 2-dimensional barcode. The charged ink may also be electrically conducting and the line elements and printel cells may be configured to form electrical structures such as electrical circuits or antennae. The charged ink may also be electrically semiconducting and by the line elements and printel cells may be configured to form electronic semiconductor devices and circuits.

An apparatus and corresponding method for preventing data loss in network devices is disclosed. The present invention monitors an incoming data stream to a network device, or devices, and in the event that an error condition is detected, predetermined error data is inserted into the data stream, wherein the predetermined error data is provided at the same data rate as the recovered data rate internal to the network device. Thus, the network device will not have to adjust to a different data rate and potentially lose data during the adjustment period.

Method and apparatus for improving data integrity and desynchronizer recovery time after a loss of signal

An apparatus for reducing the effects of pointer adjustments, wander, and jitter during desynchronization of a non-uniformly gapped data stream from a payload of a synchronized signal is disclosed. The apparatus utilizes a combination of two pointer adjustment signals embedded in the synchronized signal to determine a bit leak rate of bits from an elastic store following a pointer adjustment event such that the elastic store provides as an output a more-uniformly-distributed-gapped data stream.

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Windham, NH, United States of America

Ravi Subrahmanyan