Qualcomm Incorporated

Ravi Konda

Sandip HomChaudhuri

Pradeep Kumar Yenganti

Murali Krishna

Harinder Singh

Douglas Dahlby

BalaSubrahmanyam Chintamneedi

The disclosure relates to minimizing power consumption of a WiFi system-on-chip (SOC) during idle periods. The disclosed architecture includes memory banks for the WiFi SoC's embedded processor that can be independently powered on/off and a Memory Management Unit (MMU) to translate virtual addresses to physical addresses and generate exceptions to process accesses to virtual addresses without a corresponding physical address. The architecture can implement a demand paging scheme whereby a MMU fault from an access to code/data not within the embedded memory causes the processor to fetch the code/data from an off-chip secondary memory. To minimize page faults, the architecture stores WiFi client code/data within the embedded processor's memory that is repeatedly accessed with a short periodicity or where there is an intolerance for delays of accessing the code/data.

WiFi memory power minimization

Methods, systems, and devices are described for merging two or more power save enabled independent basic service set (IBSS) networks. In one example, a method includes receiving, at a station of a first IBSS network, a first beacon from a second IBSS network, wherein the first beacon identifies a timing synchronization function (TSF) of the second IBSS network. The method may further include transmitting, by the station, a second beacon at a next target beacon transmission time (TBTT) of the first IBSS network based on a comparison of the TSF of the second IBSS network with a TSF stored by the station, wherein the second beacon identifies a TSF of the second IBSS network.

Merging of independent basic service set (IBSS) power save (PS) enabled networks

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San Jose, CA, United States of America

Ravi Konda