Samsung Electronics Co., Ltd.

Ravi Iyengar

Bradley Gene Burgess

Sandeep Kumar Dubey

Prarthna Santhanakrishnan

Teik-Chung Tan

Ashraf Ahmed

A data processing method for a data processing system, comprising: initializing a value of a counter associated with a first entry to indicate a number of destinations of other entries on which the first entry depends; changing the value of the counter in a first direction in response to selecting a first one of the other entries; and changing the value of the counter in a second direction opposite the first direction in response to cancelling a second one of the other entries.

System and method to clear and rebuild dependencies

Reconfiguring a register file using a rename table having a plurality of fields that indicate fracture information about a source register of an instruction for instructions which have narrow to wide dependencies.

Dynamic rename based register reconfiguration of a vector register file

Out-of-order CPUs, devices and methods diminish the time penalty from stalling the pipe to rebuild a rename table, such as due to a misprediction. A microprocessor can include a pipe that has a decoder, a dispatcher, and at least one execution unit. A rename table stores rename data, and a check-point table ('CPT') stores rename data received from the dispatcher. A Re-Order Buffer ('ROB') stores ROB data, and has a dynamic mapping relationship with the CPT. If the rename table is flushed, such as due to a misprediction, the rename table is rebuilt at least in part by concurrent copying of rename data stored in the CPT, in coordination with walking the ROB.

Reorder-buffer-based dynamic checkpointing for rename table rebuilding

Out-of-order CPUs, devices and methods diminish the time penalty from stalling the pipe to rebuild a rename table, such as due to a misprediction. A microprocessor can include a pipe that has a decoder, a dispatcher, and at least one execution unit. A rename table stores rename data, and a check-point table ('CPT') stores rename data received from the dispatcher. A Re-Order Buffer ('ROB') stores ROB data, and has a static mapping relationship with the CPT. If the rename table is flushed, such as due to a misprediction, the rename table is rebuilt at least in part by concurrent copying of rename data stored in the CPT, in coordination with walking the ROB.

Reorder-buffer-based static checkpointing for rename table rebuilding

A method and apparatus for simultaneously canceling a dependent instruction and a nested dependent instruction when a cancel timer of a source of the dependent instruction and a cancel timer of a source of the nested dependent instruction expire and a producer instruction speculatively waking up the dependent instruction is canceled.

Efficient way to cancel speculative 'source ready' in scheduler for direct and nested dependent instructions

A data processing system and method of clearing and rebuilding dependencies, the data processing method including changing a counter associated with a first entry in response to selecting a second entry; comparing the counter with a threshold; and indicating that the first entry is ready to be selected in response to comparing the counter with the threshold; wherein the first entry is dependent on the second entry.

A method and apparatus for register packing prior to register renaming in a microprocessor are provided. The method includes: receiving a plurality of micro operations (micro-ops) decoded from one or more instructions; packing a plurality of registers which are included in the micro-ops into a packed register structure including a plurality of packed registers based on a preset number of rename ports of a renamer through which the packed registers are read or written for register renaming; and sending the packed registers for register renaming.

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Austin, TX, United States of America

Ravi Iyengar