Samsung Electronics Co., Ltd.

Raun M Krisch

David Conrad Tannenbaum

Gabriel T Dagani

Christopher P Frascati

Zachary Neyland

Robert Metzger

A system and a method are disclosed for post-processing variable pixel rate shader output using gradients in a graphics processing unit. A block of pixels is selected that corresponds to a predetermined kernel size for variable rate shading in a draw call of an application. A pixel shader run is instantiated to generate pixel shading values for at least two pixels located within the block of pixels. A gradient output is generated based on an interpolation of the pixel shading values for the at least two pixels over the block of pixels. The predetermined kernel size may include at least one of a 4×2 block of pixels, a 2×4 block of pixels, a 4×4 block of pixels, an 8×4 block of pixels, a 4×8 block of pixels, and an 8×8 block of pixels or larger. The at least two pixels may be corner pixels of the block of pixels.

Method and apparatus for improving the image quality of variable rate shading using gradients

A method for performing an atomic memory operation may include receiving an atomic input, receiving an address for an atomic memory location, and performing an atomic operation on the atomic memory location based on the atomic input, wherein performing the atomic operation may include performing a first operation on a first portion of the atomic input, and performing a second operation, which may be different from the first operation, on a second portion of the atomic input. The method may further include storing a result of the first operation in a first portion of the atomic memory location, and storing a result of the second operation in a second portion of the atomic memory location. The method may further include returning an original content of the first portion of the atomic memory location concatenated with an original content of the second portion of the atomic memory location.

Methods and apparatus for atomic operations with multiple processing paths

A system and a method are disclosed that optimizes a graphics driver. The system may be embodied as a computing device that includes a storage that is internal to the computing device, a graphic processing unit that includes a driver and a controller. The controller may be configured to run a daemon process that optimizes a shader and/or a shader pipeline for an application that is resident on the computing device when the computing device is not running the application and stores at least one optimization for the shader in the storage. The at least one optimization may be based on the application. The daemon process may further receive a request from the driver of the GPU for an optimization for the shader/shader pipeline during a runtime compilation of the shader and provide the at least one optimization to the driver of the GPU from the storage.

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Dripping Springs, TX, United States of America

Raun M Krisch