Texas Instruments Corporation

Raul Alejandro Perez

Mohammad A Al-Shyoukh

Baoson Nguyen

Mohammad Ali Odeh Al-Shyoukh

The buffer circuit includes a first transistor MPhaving a first end coupled to an output node Nand a control node coupled to an input node N; a second transistor MNcoupled to a second end of the first transistor MP; a third transistor MNcoupled to the second transistor MNsuch that a current in the third transistor MNis mirrored to the second transistor MN; a first sense device MPcoupled to the output node N; a first current source Icoupled to the output node N; a second current source Icoupled to the third transistor MN; a second sense device MPcoupled to the third transistor MN; and a bipolar device Qcoupled to the output node Nand having a base coupled to the second end of the first transistor MP

Power efficient dynamically biased buffer for low drop out regulators

A low voltage amplifier having a class-AB control circuit which generates minimal or no surge current when the output of the amplifier clips to ground or the negative rail. The amplifier includes an input stage, a summing circuit, a class-AB control circuit and an output stage. The input stage connects to a first current source and couples to receive a pair of differential input signals to generate intermediate signals that are summed together using the summing circuit. A second current source supplies the summing circuit with current. The class-AB control circuit receives the summed signals from the summing circuit to provide control for the output stage which generates the amplifier result at the output of the amplifier which delivers current to drive an external load. Specifically, the class-AB control circuit is improved by the addition of a PMOS device connected in such a way to cut off the DC current path that is generated during the output stage clipping condition by a diode connected PMOS device and a NMOS sensing device both located near the output of the class-AB control circuit. Thereby, the additional PMOS device minimizes the surge current generated by the NMOS sensing device when the output of the amplifier clips to ground or the negative rail.

Low voltage amplifier having a class-AB control circuit

The low AC impedance input stage circuit for fast startup applications includes: a first transistor coupled between a first input node and a first output node; a second transistor coupled between a second input node and a second output node, and having a control node coupled to a control node of the first transistor; a third transistor coupled to the first input node and having a control node coupled to the control node of the first transistor; a fourth transistor coupled to the second input node and having a control node coupled to the control node of the third transistor; a first blocking device coupled between the third transistor and a first current source; a second blocking device coupled between the fourth transistor and the first current source; and a bias device coupled between the first current source and the control node of the first transistor.

Low AC impedance input stage for fast startup applications

Circuits and methods for dynamically stabilizing a circuit having a relatively small capacitive load two current loop sub circuits are provided. A main current loop and an associated sensing loop are coupled such that a compensation capacitance supplied to each sub circuit loop individually will remain isolated and will not be cumulative with respect to the remainder of the circuit.

Methods and systems for decoupling the stabilization of two loops

The Vt of an MOS transistor is lowered in response to its load current. In a LDO (low dropout) regulator, lowering the Vt of the pass transistor with load increases the level of drive that can be applied to the pass transistor thus allowing a smaller transistor to be used for the same load.

Threshold voltage adjustment for MOS devices

The present invention provides increased output swing by connecting a buffer backgate to an upper rail potential ( ) during the no load current condition. This can be done through the use of a comparator ( ) and a multiplexer ( ), thereby changing the threshold voltage of the buffer ( ).

Threshold voltage adjustment scheme for increased output swing

A capacitively compensated voltage regulator, adapted to be supplied with power from a voltage supply, and having an input port and an output port. The voltage regulator includes a voltage regulation circuit responsive to a reference voltage at the input port to provide a regulated voltage at the output port, including a compensation capacitor having a plate connected to a node internal to the voltage regulator, and including a current source coupled between the voltage supply and the internal node. The voltage regulator also includes a low power control circuit responsive to a low power command signal. The low power control circuit includes a delay circuit responsive to a transition in the level of the low power command signal to generate a low power control signal for a predetermined time period after said transition, and also a bypass circuit coupled between the internal node and the voltage supply, responsive to the low power control signal to provide, for the predetermined time period, a current higher than the current provided by the current source, and otherwise to provide substantially no current. By the action of the standby control circuit a voltage overshoot or surge at the output port of the voltage regulator circuit is avoided.

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Richardson, TX, United States of America

Raul Alejandro Perez