US Government As Represented by the Secretary of the Army

Other

Raphael Tsu

Robert A Lux

James F Harvey

Leo Esaki

Leroy L Chang

George A Sai-Halasz

Michael F Tompsett

A solid state electronic device exhibiting negative differential resistance is fabricated by depositing a thin layer of amorphous silicon on a single crystal substrate, doped N,. The amorphous silicon is simultaneously crystallized and oxidized in a dry N,and O,mixture. The result is a layer of amorphous SiO,surrounding microclusters of crystalline silicon. A layer of polycrystalline silicon is deposited to a thickness of approximately 0.5 micron. Ohmic metal contacts are made to the top and bottom. These active layers are isolated by insulating SiO,. A bias voltage applied between the metal contacts results in negative differential resistance due to tunneling through resonant energy levels in microclusters.

Negative differential resistance device based on tunneling through microclusters, and method therefor

A solid state electronic device exhibiting negative differential resistance s fabricated by depositing a thin layer of amorphous silicon on a single crystal substrate, doped N.sup.+. The amorphous silicon is simultaneously crystallized and oxidized in a dry N.sub.2 and O.sub.2 mixture. The result is a layer of amorphous Sio.sub.2 surrounding microclusters of crystalline silicon. A layer of polycrystalline silicon is deposited to a thickness of approximately 0.5 micron. Ohmic metal contacts are made to the top and bottom. These active layers are isolated by insulating SiO.sub.2. A bias voltage applied between the metal contacts results in negative differential resistance due to tunneling through resonant energy levels in microclusters.

Negative differential resistance device based on tunneling through

The invention provides light sources which are easily compatible with standard silicon VLSI processing and can be located directly in the material of the silicon VLSI chip. P-type silicon substrate is processed to produce proturbances, the proturbances preferably having tip dimensions on the order of 5-10 mm. A native oxide film (SiO.sub.2) is caused to develop on the surface of the silicon substrate. A thin, transparent, conductive film is then deposited on top of the SiO.sub.2. Electrical contacts are made to the top of the conductive film and to the bottom of the silicon substrate. The carriers for electroluminescence are supplied by the P-doped silicon substrate (holes) and the conductive film (electrons). When a voltage is applied across the layers via the electrical contacts, the holes are concentrated in the region of the tip of the proturbances because the electric field lines concentrate near a pointed object, and electron current across the SiO.sub.2 barrier in response to the voltage drop will be largest in the vicinity of the tip because the SiO.sub.2 barrier is thinnest there, resulting in strong visible luminescence.

Silicon nanostructure light-emitting diode

A light emitting diode comprising microporous silicon of one conductivity type forming a PN junction with silicon of the opposite conductivity type and electrodes respectively connected to said regions, at least one of the electrodes being transparent.

Light emitting diode with electro-chemically etched porous silicon

A quantum well structure useful for semiconducting devices comprises two barrier regions and a thin epitaxially grown monocrystalline semiconductor material quantum well sandwiched between said barrier regions. Each barrier region consists essentially of alternate strain layers forming a superlattice, each of said layers being thinner than said quantum well. The layers are so thin that no defects are generated as a result of the release of stored strain energy.

Quantum well structures useful for semiconductor devices

A superlattice structure is disclosed in which alternating layers of semiductor alloy materials provide a one dimensional spatial periodic variation in band edge energy. A first layer of the superlattice device is an alloy including a first Group III material and a first Group V material, preferably In As, while the second layer is an alloy including a second Group III material different from the first Group III material and a second Group V material different from the first Group V material, and preferably GaSb. In the superlattice structure the valence band of the second alloy is closer to the conduction band of the first alloy than it is to the valence band of the first alloy.

Heterojunction superlattice with potential well depth greater than half

It is taught that infrared light can be produced by applying a voltage to a semiconductor device with a superlattice region and, further, that a population inversion can be achieved in such a device so that infrared amplification and oscillation can be produced. Methods of producing infrared radiation and of amplifying infrared radiation utilizing semiconductor devices with superlattice regions are disclosed. Also, semiconductor devices with superlattice regions for use as a laser amplifier or oscillator are taught.

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Charlotte, NC, United States of America

Raphael Tsu