Hewlett-packard Development Company, L.p.

Hewlett Packard Enterprise Development LP

Raphael Gay

Peter Andrew Seiler

Shane Ward

Taciano Perez

Roger A Pearson

Tadeu Marchese

Byron Alan Alcorn

Paul Howard Mazurkiewicz

Peter Christian Peterson

Kirsten Olsen

Ning Ge

Tom J Searby

Siamak Tavallaei

Jonathan D Bassett

Helen Ann Holder

Thomas A Bondurant

Kimon Berlin

Carlos Haas

Linden H McClure

Tom Fisher

Charles Andrew Hartman

Cameron Key

Finagnon Thierry Dossou, Jr

Christine Lin

Pedro Henrique Garcez Monteiro

Linden H Mcclure

Example systems relate to system call acceleration. A system may include a processor and a non-transitory computer readable medium. The non-transitory computer readable medium may include instructions to cause the processor to run a plurality of benchmarks for a hardware configuration. The non-transitory computer readable medium may further include instructions to determine a benchmark matrix based on the plurality of benchmarks. The non-transitory computer readable medium may include instructions to determine an input/output (I/O) bandwidth ceiling for the hardware configuration based on the benchmark matrix. Additionally, the non-transitory computer readable medium may include instructions to determine a performance threshold of an I/O access parameter for the hardware configuration based on the bandwidth ceiling.

Performance threshold

In an example, an air filter system includes an air filter and a thermally conductive particulate sensor (TCPS). The TCPS includes a temperature sensor to measure a first temperature of the TCPS at a first time, measure a second temperature of the TCPS at a second time, and provide the measured first temperature and the measured second temperature to a controller. The controller to determine an actual rate of temperature change based on the measured first temperature and the measured second temperature, compare the actual rate of temperature change to a target rate of temperature change, and provide a notification when a difference between the actual rate of temperature change and the target rate of temperature change is greater than an accumulation threshold indicative of a threshold amount of particulate accumulation on the TCPS.

Thermally conductive particulate sensor

A program is executed on a first computer system and the execution of the program is monitored. A plurality of operation records are created based upon the monitoring, where each operation record is associated with an operation carried out during execution of the program. A first value of a cumulative performance indicator associated with the execution of the program on the first computer system is determined. For each operation record, a value of a performance indicator associated with carrying out the operation on a second computer system is predicted. For an operation record, the value of the performance indicator is predicted based on a performance model associated with carrying out operations on the second computer system. A second value of the cumulative performance indicator is determined, which is associated with execution of the program on the second computer system and is based on the predicted values of the performance indicator.

Predicting performance of a computer system

A computing system for collecting hardware performance data includes a number of programmable counters associated with a number of units of a computing device. The computing system further includes an assignment module executed by a processor to assign a plurality of interleaving groups of counters based on a user-defined priority list of parameters.

Collecting hardware performance data

In example implementations, a computing system is provided. The computing system includes at least one electronic component, a fan and a filter. The electronic component generates heat that is cooled by an air flow within the computing system that is generated by the fan. The filter is located in a path of the air flow. The filter includes a filter mesh with a strain gauge that is encapsulated and incorporated into the filter mesh to measure an amount that the filter mesh is clogged.

Filter mesh with incorporated strain gauge

An example system for a performance gains predictor includes a counter engine to determine a number of events during an application session of a computing system utilizing a first processor, a metrics engine to calculate a number of metrics for the first processor based on the number of events, a factor engine to determine a number of factors of the first processor that can affect the number of metrics based on an evaluation of the computing system, and a performance engine to predict a performance change of the computing system utilizing a second processor based on the number of factors.

Performance change predictions

Examples disclosed herein relate to data channel allocation. An example includes an apparatus, including a resource to connect to a controller in a first state and a peripheral card in a second state. Example apparatus include a controller to control a connection to an interface card and to connect to the resource via a first data channel in the first state, the first data channel to connect the resource and the peripheral card in the second state.

Data channel allocation

An apparatus includes a memory card that includes at least one memory module and an expansion connector to connect with at least one expansion memory card. A lane distributor on the memory card interfaces with a set of bidirectional lanes and provides a base lane set and an expanded lane set of bidirectional lanes to support communications with the memory module and the expansion memory card via the expansion connector.

Memory card expansion

An apparatus includes a pass-through module that includes connector pins to connect with at least one active motherboard connector and to separately connect with at least one routing motherboard connector. A routing function on the pass-through module redirects a set of bidirectional lanes from the connector pins connected to the active motherboard connector to the connector pins connected to the routing motherboard connector to enable a connection of the set of bidirectional lanes to at least one other motherboard connector via the routing motherboard connector.

Bidirectional lane routing

An apparatus includes a pass-through module that includes connector pins to connect with at least one active portion of a motherboard connector and to separately connect with at least one inactive portion of the motherboard connector. A routing function on the pass-through module redirects a set of bidirectional lanes from the connector pins connected to the active portion of the motherboard connector to the connector pins connected to the inactive portion of the motherboard connector to enable a connection of the set of bidirectional lanes to at least one other motherboard resource connected to the inactive portion of the motherboard connector.

Redirection of lane resources

Example implementations relate to memory mode categorization. An example memory mode categorization can include determining local and remote data bandwidths received at each of a first processor and a second processor for a data sample, comparing the local and the remote data bandwidths to a first threshold bandwidth and a second threshold bandwidth, respectively, creating a traffic pattern for the data sample based on the comparison, and categorizing the data sample as being a candidate for a particular memory mode based on the created traffic pattern.

Memory mode categorizations

Example embodiments disclosed herein relate to configuring a flexible port. The configuration of a computing device is detected based on a coupling of an interface to a flexible input/output port. The flexible input/output port is configured based on the detected configuration of the computing device.

Flexible port configuration based on interface coupling

In one example in accordance with the present disclosure, a computing system is provided. The computing system includes a first bus controller to control X bus lanes, a second bus controller to control Y bus lanes, a 2-to-1 X lane multiplexer, and a Y lane system component, where Y&#x3e;X&#x3e;0. X lanes from the first bus controller are coupled to the 2-to-1 X lane multiplexer. X lanes from the second bus controller are coupled to the 2-to-1 X lane multiplexer, and Y-X lanes from the second bus controller are coupled directly to the Y lane system component. In addition, X lanes from the 2-to-1 X lane multiplexer are coupled to the Y lane system component.

Computing system control

Example implementations relate to using an alternative memory (AltMem) to reduce read latency of a memory module having a dynamic random-access memory (DRAM). In example implementations, write data may be written to the DRAM and to the AltMem. A read command may be issued to the AltMem if a DRAM read latency time for executing the read command is greater than an AltMem read latency time for executing the read command. Data read from the AltMem in response to the read command may be received.

Growing community of inventors

Fort Collins, CO, United States of America

Raphael Gay