Mosaid Technologies Corporation

Conversant Intellectual Property Management Incorporated

Randy J Caplan

Steven J Schwake

Andrew J Cole

Steven P Hardy

A leakage manager system for adequately minimizing static leakage of an integrated circuit is disclosed. The leakage manager system includes a generator configured to generate a control signal to be applied to a sleep transistor. A monitor is configured to determine whether to adjust the control signal to adequately minimize the static leakage. In some embodiments, the monitor includes an emulated sleep transistor. A regulator is configured to adjust the control signal depending on the determination.

Systems and methods for minimizing static leakage of an integrated circuit

A system and method for performing phase-locked loop is disclosed. The system includes phase frequency detector circuitry, charge pump circuitry having first current mirror circuitry and second current mirror circuitry, loop filter circuitry, and voltage controlled oscillator circuitry. The phase frequency detector circuitry generates an up signal and a down signal based on the phase difference of an input signal and a feedback signal. The charge pump circuitry includes the first current mirror circuitry and the second mirror circuitry and generates a charge pump output signal based on the up and down signals. The loop filter circuitry generates a filtered control signal based on the charge pump output signal. The voltage controlled oscillator circuitry generates the feedback signal with a repeating waveform based on the filtered control signal.

Phase-locked loop circuitry using charge pumps with current mirror circuitry

Phase-locked loop circuitry includes charge pump circuitry, loop filter circuitry, and drag current circuitry. The charge pump circuitry generates a charge pump current based on a phase of an input signal. The loop filter circuitry receives the charge pump current. The drag current circuitry generates a drag current to draw charge in the opposite direction from the charging current from a loop filter integration capacitor in the loop filter circuitry that does not include voltage sensing circuitry.

Phase-locked loop filter capacitance with a drag current

Example systems and methods for a charge pump are disclosed. A charge pump may comprise a pump capacitor configured to charge when electrically coupled to a sleep signal and discharge when electrically coupled to an output, a means for receiving an alternating signal which electrically couples a Vsignal or an output to the pump capacitor based on a state of the alternating signal, a means for receiving a complement of the alternating signal which electrically couples the sleep signal with the pump capacitor based on a state of the complement of the alternating signal, and a means to electrically couple the alternating signal and the complement of the alternating signal to a node based on the state of the alternating signal and the state of the complement of the alternating signal.

To minimize static leakage of an integrated circuit, a charge pump generates a negative voltage to be applied to a 'sleep' transistor cascaded to a logic gate of the integrated circuit. An adaptive leakage controller determines continuously or periodically whether to adjust the negative voltage to minimize the static leakage. A negative voltage regulator adjusts the negative voltage depending on the determination. Some embodiments determine whether to adjust the negative voltage by monitoring one or more parameters of the sleep transistor. Some embodiments determine whether to adjust the negative voltage by monitoring one or more parameters of an emulated sleep transistor.

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Hoschton, GA, United States of America

Randy J Caplan