Other

Finisar Corporation

Jds Uniphase Corporation

Quicklogic Corporation

Finsiar Corporation

Randy Ichiro Oyadomari

Arthur Michael Lawson

Stephen Charles Gordy

George Anthony Bullis

Stephen H Strong

Minh Q Vu

Stephen Strong

Gerald Francis Sage

Timothy Saxe

Doug Durham

Scott R Baxter

Oleg Nikitovich Khainovski

Ken Hornyak

Dan Aizenstros

End-user software is used to select lists of values of control signals from a predetermined design of a processor, and a unique value of an opcode is assigned to each selected list of values of control signals. The assignments, of opcode values to lists of values of control signals, are used to create a new processor design customized for the end-user software, followed by synthesis, place and route, and netlist generation based on the new processor design, followed by configuring an FPGA based on the netlist, followed by execution of the end-user software in customized processor implemented by the FPGA. Different end-user software may be used as input to generate different assignments, of opcode values to lists of control signal values, followed by generation of different netlists. The different netlists may be used at different times, to reconfigure the same FPGA, to execute different end-user software optimally at different times.

Assigning operational codes to lists of values of control signals selected from a processor design based on end-user software

Protocol analyzers systems and methods coordinate the capture of network data of interest across multiple chassis. Each chassis has individual blades with accompanying ports and is serially connected to other chassis in the system. Selected ports from each chassis are configured in domains that can be spread across the serially connected chassis and used in coordination to capture network data of interest. A serial protocol containing control signals is used to transmit run, stop, and trigger data between the serially connected chassis and thereby coordinate the activity of ports within each domain. Through the use of the serial protocol the number of wires connecting adjacent chassis is minimized and each of the blades in the multi-chassis systems can be synchronously started, stopped, and triggered at the same time to synchronously capture the network data of interest.

Propagation of signals between devices for triggering capture of network data

Protocol analyzer systems enable synchronization of timestamps and the capture of data across serially chained boxes that are used together to monitor and capture network data. Through experiment, it can be determined how long it takes to propagate a signal to each box in the chain. These values are then recorded in each box in a delay register so that each box has a recorded delay value corresponding to the time required to propagate a signal to or receive a signal from every other box. Each box applies a control signal, such as a run signal or a trigger signal, to the ports in the box only after the expiration of the delay value indicated in the delay register. The box initiating the signal has the largest delay since the other boxes need to get the signal before the boxes can begin to operate with a common counter, with successive boxes having smaller delays.

Synchronization of timestamps to compensate for communication latency between devices

An optical signal return path system analog RF signals are sampled using a master clock frequency, and combined with digital data such as Ethernet data at a cable node. The cable node sends the combined signals on a return path over a fiber optic medium to the cable hub. The cable hub extracts an approximate in-frequency replicate of a master clock signal, and can use the replicate master clock signal to desample the digitized RF signals back to analog. The cable hub can further use the replicate of the master clock signal to serialize Ethernet data, and send the Ethernet data back to the cable node via an optical cable in the forward direction. Accordingly, a single master clock signal can be used on a CATV network for encoding/decoding, and transmitting a variety of data signals, which enhances the integrity and reliability of the data signals.

Single master clock control of Ethernet data transfer over both a cable TV return path and an Ethernet forward path

Multi-chassis systems determine their topology and self-organize through a discovery process. The systems include one or more chassis, each with individual blades and ports, which are serially chained together. When the discovery process is initiated, chassis identification data in buffers in each chassis is propagated to adjacent chassis and is then used to initiate communication via a network connection. Once the chassis are able to communicate via the network connection, at least one chassis in the system receives the chassis identification data of each chassis and can thereby identify each chassis. The chain is then divided into one or more sync-groups and master and slave chassis are designated. Each sync-group is configured to ignore data from other sync-groups. Domains are also configured from sets of ports within each sync-group. Events that may trigger the discovery process include power-up, the connection of a cable, the removal of a cable, or instructions to transition from normal mode to discovery mode.

Discovery and self-organization of topology in multi-chassis systems

A multi-chassis system includes at least a first chassis and a second chassis that each includes one or more blades. The one or more blades in turn include one or more ports. The two or more chassis are connected through use of an interconnector. The multi-chassis system may also include access to one or more microprocessors that may execute thereon software that controls the propagation of the arm condition. The arm condition is generated at a first port of a first chassis or network analyzer blade coupled to the first chassis. The arm condition is then transmitted to one or more additional ports of the first chassis while not being transmitted to any ports of the second chassis. Finally, the reception of a precondition for triggering defined by the arm condition is limited to those ports that have received the arm condition.

Arm and rollback in a multi-chassis system

A cable node and a cable hub that communicate on a CATV network are configured to switch communication modes without signal loss or degradation due to delays in switching communication modes. In particular, a cable node sends one or more mute commands in an outgoing data stream to the cable hub, causing the cable hub to disable the RF outputs. Afterward, or along with the one or more mute commands, the cable node can send a switch mode command, thereby causing the cable hub to switch to the appropriate next communication mode, such as a communication mode using a new compression rate. When the cable hub has switched to the appropriate next communication mode, the cable hub can then properly receive and decode a corresponding data stream using the next communication mode.

Changing communication mode in a CATV pathway using mute commands

An efficient means for transmitting digitized return path signals over a cable television return path is disclosed. In one embodiment of the invention, the cable television return path includes a node that receives an analog return signal from a subtree of the cable television system and generates a digital transport signal representative of the analog return path signal. The digital transport signal, however, is not a digitized form of the analog return signal. Rather, the digital transport signal is encoded such that fewer bits are used to represent the analog return signal without substantially impacting the accuracy and dynamic range of the signal. At the hub, the digital transport signal is decoded and converted to produce an analog signal that is a close approximation of the analog return signal.

Efficient transmission of digital return path data in cable television return path

Creation of port domains in a multi-chassis system. The multi-chassis system includes two or more chassis that each includes one or more blades. In one embodiment, a sync group of at least two chassis is created, typically by connecting the two or more chassis with an interconnection means such as a sync-cable. Then, two or more ports of the sync group are selected for inclusion in a port domain. The locations of the ports relative to each other is then determined. Finally, a port domain is generated based on the relative locations of the ports and port domain generation rules. If the ports are on separate chassis, then a global domain is generated if a predetermined number of global domains do not already exist and if the ports are on the same chassis, a local domain is generated regardless of the number of global domains.

Multiple domains in a multi-chassis system

A cable node and a cable hub that communicate on a CATV network are configured to switch compression modes without signal noise or degradation due to excessive delays in switching compression modes. In particular, a cable node sends one or more mute commands in an outgoing data stream to the cable hub, causing the cable hub to disable the RF outputs. Afterward, or along with the one or more mute commands, the cable node can send a switch mode command, thereby causing the cable hub to switch to the appropriate next communication mode, such as a communication mode using a new compression rate. When the cable node and the cable hub have switched to the appropriate next communication mode, the cable hub can then properly receive a corresponding data stream from the cable node using the next communication mode.

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San Jose, CA, United States of America

Randy Ichiro Oyadomari