Micron Technology Incorporated

Applied Materials, Inc.

Steag Rtp Systems Gmbh

Other

Mattson Technology, Inc

Randhir P S Thakur

Scott Jeffrey DeBoer

Michael L Nuttall

Klaus Florian Schuegraf

Husam N Al-Shareef

Garry Anthony Mercaldi

Yongjun Jeff Hu

Gurtej S Sandhu

Howard E Rhodes

Er-Xuan Ping

J Brett Rolfson

F Daniel Gealy

Dan Gealy

Robert James Burke

Ravi T Iyer

Ronald Allen Weimer

Kirk D Prall

John T Moore

Alan R Reinberg

Zhiqiang (Jeff) Wu

Mark Fischer

Vijay Parihar

Pai Hung Pan

James Beck

Deepa Ratakonda

Fernando N Gonzalez

John K Zahurak

Gordon A Haller

Kevin G Donohoe

Yao Zhi Hu

James Pan

Sing Pin Tay

Carl Powell

Trung Tri Doan

Tyler A Lowrey

Kunal R Parekh

Pai-Hung Pan

Abhilash J Mayur

Ming Xi

Avgerinos V Gelatos

Dean C Jennings

Yauh-Ching Liu

Alfred W Mak

Salvador P Umotoy

Steve G Ghanayem

Lyle D Breiner

Kaushal Kishore Singh

Timothy N Thomas

Jeff Zhiqiang Wu

Vedapuram S Achutharaman

David L Chapek

Arnon Gat

Scott J Deboer

Shenlin Chen

Walter Benjamin Glenn

Brett Rolfson

Er-Xang Ping

Ayad A Al-Shaikh

Ahmad A Khan

Scott Jeffery DeBoer

Shenline Chen

John H Das

Vishnu Kumar Agarwal

Robert Jan Visser

Stephen Moffatt

Zheng Yuan

Pravin K Narwankar

Dieter Haas

Ruojia R Lee

Ashish Goel

Ashutosh Agarwal

Deepak Jadhav

Robert K Carstensen

Gurtei Singh Sandhu

John P Friedenreich

Per-Ove Hansson

Dave Clarke

Embodiments described herein provide a remote plasma system utilizing a microwave source. Additionally, generation and deposition techniques for 2D transition metal chalcogenides with large area uniformity utilizing microwave assisted generation of radicals is disclosed. Plasma may be generated remotely utilizing the microwave source. A processing platform configured to deposit 2D transition metal chalcogenides is also disclosed.

Method and apparatus for microwave assisted chalcogen radicals generation for 2-D materials

Embodiments of the invention generally relate to solar cell devices and methods for manufacturing such solar cell devices. In one embodiment, a method for forming a solar cell device includes depositing a conversion layer over a first surface of a substrate, depositing a first transparent conductive oxide layer over a second surface of the substrate that is opposite the first surface, depositing a first p-doped silicon layer over the first transparent conductive oxide layer, depositing a first intrinsic silicon layer over the first p-doped silicon layer, and depositing a first n-doped silicon layer over the first intrinsic silicon layer. The method further includes depositing a second transparent conductive oxide layer over the first n-doped silicon layer, and depositing an electrically conductive contact layer over the second transparent conductive oxide layer.

Methods for enhancing light absorption during PV applications

A dynamic surface anneal apparatus for annealing a semiconductor workpiece has a workpiece support for supporting a workpiece, an optical source and scanning apparatus for scanning the optical source and the workpiece support relative to one another along a fast axis. The optical source includes an array of laser emitters arranged generally in successive rows of the emitters, the rows being transverse to the fast axis. Plural collimating lenslets overlie respective ones of the rows of emitters and provide collimation along the fast axis. The selected lenslets have one or a succession of optical deflection angles corresponding to beam deflections along the fast axis for respective rows of emitters. Optics focus light from the array of laser emitters onto a surface of the workpiece to form a succession of line beams transverse to the fast axis spaced along the fast axis in accordance with the succession of deflection angles.

Fast axis beam profile shaping for high power laser diode based annealing system

The present invention relates to methods for forming microelectronic structures in a semiconductor substrate. The method includes selectively removing dielectric material to expose a portion of an oxide overlying a semiconductor substrate. Insulating material may be formed substantially conformably over the oxide and remaining portions of the dielectric material. Spacers may be formed from the insulating material. An isolation trench etch follows the spacer etch. An optional thermal oxidation of the surfaces in the isolation trench may be performed, which may optionally be followed by doping of the bottom of the isolation trench to further isolate neighboring active regions on either side of the isolation trench. A conformal material may be formed substantially conformably over the spacer, over the remaining portions of the dielectric material, and substantially filling the isolation trench. Planarization of the conformal material may follow.

Method for forming a self-aligned isolation structure utilizing sidewall spacers as an etch mask and remaining as a portion of the isolation structure

An apparatus for cyclical depositing of thin films on semiconductor substrates, comprising a process chamber having a gas distribution system with separate paths for process gases and an exhaust system synchronized with operation of valves dosing the process gases into a reaction region of the chamber.

Apparatus for cyclical depositing of thin films

Methods and apparatus for hot wire chemical vapor deposition (HWCVD) are provided herein. In some embodiments, an inline HWCVD tool may include a linear conveyor for moving a substrate through the linear process tool; and a multiplicity of HWCVD sources, the multiplicity of HWCVD sources being positioned parallel to and spaced apart from the linear conveyor and configured to deposit material on the surface of the substrate as the substrate moves along the linear conveyor; wherein the substrate is coated by the multiplicity of HWCVD sources without breaking vacuum. In some embodiments, methods of coating substrates may include depositing a first material from an HWCVD source on a substrate moving through a first deposition chamber; moving the substrate from the first deposition chamber to a second deposition chamber; and depositing a second material from a second HWCVD source on the substrate moving through the second deposition chamber.

Hot wire chemical vapor deposition (CVD) inline coating tool

Structures and methods for making a semiconductor structure are discussed. The semiconductor structure includes a rough surface having protrusions formed from an undoped silicon film. If the semiconductor structure is a capacitor, the protrusions help to increase the capacitance of the capacitor. The semiconductor structure also includes a relatively smooth surface abutting the rough surface, wherein the relatively smooth surface is formed from a polycrystalline material.

Methods for enhancing capacitors having roughened features to increase charge-storage capacity

Methods for promoting interface bonding energy utilized in SOI technology are provided. In one embodiment, the method for promoting interface bonding energy includes providing a first substrate and a second substrate, wherein the first substrate has a silicon oxide layer formed thereon and a cleavage plane defined therein, performing a dry cleaning process on a surface of the silicon oxide layer and a surface of the second substrate, and bonding the cleaned silicon oxide surface of the first substrate to the cleaned surface of the second substrate.

Methods for surface activation by plasma immersion ion implantation process utilized in silicon-on-insulator structure

Fast axis beam profile shaping by collimation lenslets for high power laser diode based annealing system

This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (NO) and ozone (O). The presence of Oin the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which NO is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of Ointerferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of NO alone virtually self-limiting The presence of Oin the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with NO in the presence of a strong, fluorine-containing oxidizing agent such as NFor SF.

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A method is disclosed for reducing the effects of buckling, also referred to as cracking or wrinkling in multilayer heterostructures. The present method involves forming a planarization layer superjacent a semiconductor substrate. A barrier film having a structural integrity is formed superjacent the planarization layer. A second layer is formed superjacent the barrier film. The substrate is heated sufficiently to cause the planarization layer to expand according to a first thermal coefficient of expansion, the second layer to expand according to a second thermal coefficient of expansion, and the structural integrity of the barrier film to be maintained. This results in the barrier film isolating the planarization layer from the second layer, thereby preventing the planarization layer and the second layer from interacting during the heating step.

Approach to avoid buckling in BPSG by using an intermediate barrier layer

A polysilicon film is formed with enhanced selectivity by flowing chlorine during the formation of the film. The chlorine acts as an etchant to insulative areas adjacent polysilicon structures on which the film is desired to be formed. Bottom electrodes for capacitors are formed using this process, followed by an anneal to create hemishperical grain (HSG) polysilicon. Multilayer capacitor containers are formed in a non-oxidizing ambient so that no oxide is formed between the layers. The structure formed is planarized to form separate containers made from doped and undoped amorphous silicon layers. Selected ones of undoped layers are seeded in a chlorine containing environment and annealed to form HSG. A dielectric layer and second electrode are formed to complete the cell capacitor.

Methods of forming HSG layers and devices

This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (NO) and ozone (O). The presence of Oin the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which NO is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of Ointerferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of NO alone virtually self-limiting. The presence of Oin the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with NO in the presence of a strong, fluorine-containing oxidizing agent such as NFor SF.

This invention improves the quality of gate oxide dielectric layers using a two-pronged approach, thus permitting the use of much thinner silicon dioxide gate dielectric layers required for lower-voltage, ultra-dense integrated circuits. In order to eliminate defects caused by imperfections in bulk silicon, an in-situ grown epitaxial layer is formed on active areas following a strip of the pad oxide layer used beneath the silicon nitride islands used for masking during the field oxidation process. By growing an epitaxial silicon layer prior to gate dielectric layer formation, defects in the bulk silicon substrate are covered over and, hence, isolated from the oxide growth step. In order to maintain the integrity of the selective epitaxial growth step, the wafers are maintained in a controlled, oxygen-free environment until the epitaxial growth step is accomplished. In order to eliminate defects caused by a native oxide layer, the wafers are maintained in a controlled, oxygen-free environment until being subjected to elevated temperature in a controlled, oxidizing environment. In one embodiment, the oxidizing environment comprises diatomic oxygen, while in another embodiment, the oxidizing environment comprises diatomic oxygen and ozone.

High quality oxide on an epitaxial layer

Growing community of inventors

Boise, ID, United States of America

Randhir P S Thakur