Hrl Laboratories, LLC

The Boeing Company

Randall White

Daniel Yap

Peter Petre

Jose Cruz-Albrecht

Zhiwei A Xu

Yen-Cheng Kuan

Donald A Hitko

Brian N Limketkai

Alan E Reamon

Daniel S Matic

An asynchronous pulse domain to synchronous digital domain converter for converting pulse domain signals in an input asynchronous pulse domain data stream to synchronous digital domain signals in a data output stream. The converter comprises a plurality of counters arranged in a ring configuration with only one counter in the ring being responsive at any given time to positive and negative going pulses in the input asynchronous pulse domain data stream, each counter, when so responsive, counting a number of time units between either (i) a positive going pulse and an immediately following negative going pulse or (ii) a negative going pulse and an immediately following positive going pulse, the counts of the counters when so responsive being synchronously converted to synchronous digital domain signals in the data output stream. The disclosed asynchronous pulse domain to synchronous digital domain converter can be used with spike domain signals if desired.

Asynchronous pulse domain to synchronous digital domain converter

A system and method includes an array position sensing detector. The array position sensing detector includes a lateral effect position sensing detector element and a summing amplifier. The lateral effect position sensing detector element produces an output coupled with the summing amplifier through a switch.

System and method for summing outputs in a lateral effect position sensing detector array

A liquid state machine pulse domain neural processor circuit comprising an asynchronous input filter circuit provided for, at any given time, receiving a series of analog input signals and generating in response a set of time-encoded values that depend on the series of analog input signals received at said given time and before said given time; and an asynchronous trainable readout map circuit for transforming at least a portion of said set of time encoded values into output signals.

Asynchronous pulse domain processor with adaptive circuit and reconfigurable routing

Centroid locating sensors and methods for locating an illuminated spot on a detector are provided. One sensor includes a plurality of photo-diode (PD) detector elements connected to the PD detector elements. The sensor also includes a plurality of digitization comparators connected to the plurality of PD detector elements and configured to receive output signals from the plurality of PD detector elements and generate a binary 1 output when the output from the PD detector element exceeds a threshold set point and generate a binary 0 output when the output is below the threshold set point. The sensor further includes a plurality of spatial filtering logic circuits connected to the digitization comparators and are configured to receive outputs from a plurality of the PD detector elements and to reject noise for one of the PD detector elements.

Centroid locating sensors having plural spatial filtering logic circuits connected to plural digitization comparators and methods for locating an illuminated spot on a detector

A digital correlator including an input, a plurality of serially connected delay elements, wherein a first delay element of the plurality of serially connected delay elements is coupled to the input, a plurality of current elements, wherein each respective current element of the plurality of current elements is coupled to a respective delay element, and each current element has a current, and a summer for summing the currents of the plurality of current elements, the summer having an output for the digital correlator.

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Los Angeles, CA, United States of America

Randall White