Micron Technology Incorporated

Randall Paul Meyer

Skyler Arron Windh

Allan Kennedy Porterfield

Patrick Alan Estep

Douglas John Vanesko

Bashar Romanous

An assembly language program for a coarse grained reconfiguration array (CGRA), having dispatch interface information indicating operations to be performed via a dispatch interface of the CGRA to receive an input, memory interface information indicating operations to be performed via one or more memory interfaces of the CGRA, tile memory information indicating memory variables referring to memory locations to be implemented in tile memories of the CGRA, a flow description specifying one or more synchronous data flows, through the memory locations referenced via the memory variables in the tile memory information, to produce a result from the input using the CGRA.

Programming a coarse grained reconfigurable array through description of data flow graphs

Latency in a node-based compute-near-memory system can be problematic. A solution to the problem can include or use a dedicated software-based cache at each node. The cache can be configured to store information received from each of the other nodes in the system. In an example, the cache can be populated during a breadth first search algorithm to store frontier information from each of the other nodes.

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Allen, TX, United States of America

Randall Paul Meyer