Fairchild Semiconductor Corporation

Randall L Case

Jifa Hao

John L Benjamin

Jae J Yun

A power semiconductor device having high avalanche capability comprises an Ndoped substrate and, in sequence, Ndoped, Pdoped, and Pdoped semiconductor layers, the Pand Pdoped layers having a combined thickness of about 5 &#x3bc;m to about 12 &#x3bc;m. Recombination centers comprising noble metal impurities are disposed substantially in the Nand Pdoped layers. A process for forming a power semiconductor device with high avalanche capability comprises: forming an Ndoped epitaxial layer on an Ndoped substrate, forming a Pdoped layer in the Ndoped epitaxial layer, forming a Pdoped layer in the Pdoped layer, and forming in the Pand Ndoped layers recombination centers comprising noble metal impurities. The Pand Pdoped layers have a combined thickness of about 5 &#x3bc;m to about 12 &#x3bc;m.

Power semiconductor device with improved unclamped inductive switching capability and process for forming same

In an improved process for controlling and improving minority carrier lifetime in a P-i-N diode, platinum is deposited on a surface of a silicon semiconductor substrate containing at least one PN junction. The substrate is heated to a temperature of about 800&deg; C., and the platinum is diffused into the substrate as its temperature is increased at a rate of about 5&deg; C./minute to a first selected temperature of about 850-950&deg; C. Platinum diffusion is continued while the substrate is maintained at the first selected temperature for about 30-60 minutes. The substrate temperature is then increased at a rate of about 5&deg; C./minute to a second selected temperature above 950&deg; C. to about 1000&deg; C., and the substrate is maintained at the second selected temperature for about 5-30 minutes before cooling.

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Mountain Top, PA, United States of America

Randall L Case