Texas Instruments Corporation

Randall E Johnson

John E Spencer

Cecil J Davis

Rhett B Jucha

John I Jones

James M Drumm

Thomas Dyer Bonifield

Arthur M Wilson

Randall C Hildenbrand

Mark A Kressley

Dan T Hockersmith

Juanita G Miller

Frederick W Brown

Dean L Frew

Stanford P Kohan

Philip E Hecker, Jr

Joseph E Whetsel

William S Jaspersen

Louis E Peters

Lowell E Simmons

William J Stiltz

Rick Elder

The multi-chip circuit module of the invention comprises a plurality of circuit chips assembled in a laminated stack. Each chip includes a plurality of layers of thin film interconnect patterns in the normal configuration, except for the final layer or layers, which comprise a reroute pattern that locates all circuit input and output pads along a single edge of each chip. The relocated pads are provided with contact bumps to facilitate the addition of a bonded lead to each I/O pad extending therefrom to a point beyond the edge of each chip. Thus, upon lamination the protruding tips form an array of leads on a single lateral face of the laminated chip stack.

Three dimensional assembly of integrated circuit chips

A three dimensional package having at least one semiconductor chip having input/output conductive pads along its periphery includes a dielectric carrier over at least a portion of the chip and a plurality of conductors mounted on the carrier between the chip and the dielectric carrier. The plurality of conductors are mounted within the periphery of the chip with one end connected to the conductive pads and with the other end of the plurality of conductors exiting from the same side of the chip. The plurality of conductors exiting from the same side are electrically coupled to an interconnect substrate.

Assembly of semiconductor chips

A radio frequency (RF) glow discharge plasma etch electrode design is disclosed which is capable of creating high power density plasma with uniform etch rates, while providing access for automatic loading semiconductor wafers from outside of the plasma region. The electrode assembly comprises of an electrode to which RF energy is applied surrounded by an insulator, which in turn surrounded a grounded surface all of which have cylindrical symmetry. When placed a small distance from a flat, grounded substrate, the electrode assembly creates a volume which can effectively combine a high power density plasma, while maintaining a sufficient channel for pumping a gas flow and for observing the plasma optically. The same channel is widened for automatic transport of semiconductor wafers from outside of the plasma reactor chamber. Such confined high power density plasma are important for high rate, uniform, anisotropic etching, especially for silicon dioxide.

Isolation substrate ring for plasma reactor

A plasma etch system that processes one slice at a time is disclosed. The system is comprised of an entry loadlock, an exit loadlock, a main chamber, vacuum pumps, RF power supply, RF matching network, a heat exchanger, throttle valve and pressure control gas flow distribution and a microprocessor controller. A multiple slice cassette full of slices is housed in the entry load lock and after pumping to process pressure, a single slice at a time is moved by an articulated arm from the cassette through an isolation gate to the main process chamber. The slice is etched and removed from the main process chamber through a second isolation gate by a second articulated arm to a cassette in the exit loadlock. The process is repeated until all semiconductor wafers have been etched. The cassette loadlock system is able to evacuate a whole cassette of semiconductor wafers for processing which lowers the particulate environment for the slices and, provides a more stable environment for the slices by removal of moisture and preventing static discharges and additionally provides a safety feature that protects the operators from harsh or toxic gases that are traditionally used in semiconductor type plasma reactor.

Automated single slice cassette load lock plasma reactor

A substrate to use as electrode in a plasma etch reactor is fabricated from aluminum with an annulus that is anodized to protect it from being exposed to the plasma.

Anodized aluminum substrate for plasma etch reactor

A low particulate vacuum chamber semiconductor wafer input/output valve minimizes the particulate generation by taking advantage of a camming motion at the instant of closing to insure that the valve closes normal to the reaction chamber wall. This eliminates any friction between a glandular seal in the vacuum chamber wall. As the valve closes, it strikes a stop which causes a 90 degree change in direction of the valve forcing it into tape cut. This change of direction is accomplished through a combination of an upper motion of a backing plate, and a spring-loaded linkage in stock. As the gate closes there is some particulte generated at the interface of the valve plate and the stop. This is handled by placing the area of contact outside the transportation path for the semiconductor wafer.

Low particulate vacuum chamber input/output valve

An electrode and substrate assembly for a plasma reactor allows high power plasma processing with low frequency excitation. The electrode sub-assembly is contained in a chamber which is used for pre-treatment such as de-scumming photoresist or for post-etch resist stripping and passivation. A post-etch treatment is essential in plasma aluminum etching.

Powered load lock electrode/substrate assembly including robot arm,

Automated plasma reactor

Growing community of inventors

Carrollton, TX, United States of America

Randall E Johnson