Motorola Corporation

Freescale Semiconductor,inc.

Nxp Usa, Inc.

Semiconductor Components Industries, LLC

Delco Electronics Corporation

Freescale Semiconductors Inc.

Randall C Gray

William Ernest Edwards

John M Pigott

Paul T Bennett

Fred T Brauchler

Arthur J Edwards

Anthony F Andresen

Robert B Jarrett

Mike Robert Garrard

John Matthew Hall

Thierry Sicard

Ibrahim S Kandah

Jeffrey J Braun

Bryan Quinones

Joseph V DeNicholas

Ronghua Zhu

Vishnu Khemka

Jefferson W Hall

Amitava Bose

David M Susak

Byron G Bynum

W Eric Main

W David Pace

Adelore F Petrie

Darrel R Frear

Robert K Constable

Norman Lee Owens

Eric D Joseph

Edward E Li

Philippe Perruchoud

Robert P Dixon

Carl Emil D'Acosta

Vivek Gupta

Terrell Anderson

Richard Joseph Ravas

Robert M Hess

Shiraz Contractor

Tai-Hua Chen

Thomas F Karlmann

Florin Cornel Vladoianu

Philipe J Perruchoud

Brent D Rogers

Christopher B Lesher

Matthew D Thompson

Michael Garrett Neaves

In one embodiment, a transmitter circuit may be configured to transmit a signal to a receiver. The transmitter circuit may also be configured to detect receiving energy from a transient event, for example detect a transient current, and to direct at least a portion of the energy away from the transmitted signal while the transmitter circuit is transmitting the signal.

Semiconductor device and method therefor

The embodiments described herein provide systems and methods for determining the health status of a sensed switch. In general, the embodiments described herein determine a measure of a health status of the sensed switch by comparing a voltage on the sensed switch, ascertaining a first comparator state under one test condition and ascertaining a second comparator state under a second test condition. The first comparator state and the second comparator state are and then compared to determine the measure of the health status of the sensed switch.

Methods for switch health determination

A circuit for diagnostic testing includes a current source coupled to a power source and configured to provide wetting current along a path to a load control switch, a current sensor connected in series with the current source along the path, the current sensor being configured to generate a current sensor signal indicative of a current level along the path, a voltage measurement unit having an input terminal coupled to a node along the path through which the wetting current flows to reach the load control switch, the voltage measurement unit being configured to detect a state of the load control switch based on a voltage at the node, and a controller coupled to the current sensor and the voltage measurement unit, the controller being configured to determine a wetting current diagnostic condition in accordance with the current level and the detected state.

Wetting current diagnostics

Systems and methods for switch health determination

Operation of an insulated gate bipolar transistor (IGBT) is monitored by an apparatus that has a capacitor connected between a collector of the IGBT and an input node. A processing circuit, coupled to the input node, responds to current flowing through the capacitor by providing an indication whether a voltage level at the collector is changing and the rate of that change. The processing circuit also employs the capacitor current to provide an output voltage that indicates the voltage at the IGBT collector.

Apparatus and method for monitoring operation of an insulated gate bipolar transistor

The embodiments described herein provide antifuse devices and methods that can be utilized in a wide variety of semiconductor devices. In one embodiment a semiconductor device is provided that includes an antifuse, a first diode coupled with the antifuse in a parallel combination, and a second diode coupled in series with the parallel combination. In such an embodiment the first diode effectively provides a bypass current path that can reduce the voltage across the antifuse when other antifuses are being programmed. As such, these embodiments can provide improved ability to tolerate programming voltages without damage or impairment of reliability.

Antifuse with bypass diode and method thereof

Embodiments of inductive communication devices include first and second galvanically isolated IC die and a dielectric structure. Each IC die has a coil proximate to a first surface of the IC die. The IC die are arranged so that the first surfaces of the IC die face each other, and the first coil and the second coil are aligned across a gap between the first and second IC die. The dielectric structure is positioned within the gap directly between the first and second coils, and a plurality of conductive structures are positioned in or on the dielectric structure and electrically coupled with the second IC die. The conductive structures include portions configured to function as bond pads, and the bond pads may be coupled to package leads using wirebonds. During operation, signals are conveyed between the IC die through inductive coupling between the coils.

Die-to-die inductive communication devices and methods

The embodiments described herein provide a semiconductor device layout and method that can be utilized in a wide variety of semiconductor devices. In one embodiment a semiconductor device is provided that includes a plurality of deep trench isolation structures that define and surround a first plurality of first trench-isolated regions in the substrate, and further define a second plurality of second trench-isolated regions in the substrate. The first plurality of first trench-isolated regions is arranged in a plurality of first columns, with each of the first columns including at least two of the first plurality of first trench-isolated regions. Likewise, the plurality of first columns are interleaved with the second trench-isolated regions to alternate in an array such that a second trench-isolated region is between consecutive first columns in the array and such that at least two first trench-isolated regions are between consecutive second trench-isolated regions in the array.

Deep trench isolation structure layout and method of forming

Embodiments of inductive communication devices include first and second IC die and an inductive coupling substrate. The first IC die has a first coil. The inductive coupling substrate has a second coil and a first signal communication interface (e.g., a third coil or a contact). The second IC die has a second signal communication interface (e.g., a fourth coil or a contact). The first IC die and the inductive coupling substrate are arranged so that the first and second coils are aligned across a gap between the first IC die and the inductive coupling substrate. A dielectric component is positioned within the gap between the first and second coils to galvanically isolate the first IC die and the inductive coupling substrate. During operation, signals are conveyed between the first and second IC die through inductive coupling between the coils and communication through the signal communication interfaces.

Methods of manufacturing and operating die-to-die inductive communication devices

A power switching device includes a power terminal connected to a power supply; a load terminal connected to a load; a power switch connected between said power terminal and said load terminal and arranged to be conductive in a first operating state; a power conductor connected between said power terminal and said load terminal in at least one state, wherein an electrical current through said power conductor changes in response to said power switch being turned off, thereby causing self-induction in said power conductor; and a control unit arranged to control said power switch in real-time on the basis of a real-time level of said voltage across said power conductor so as to turn off said power switch in a continuous or stepwise or pulsed manner to prevent a voltage across said power conductor from exceeding a maximum allowed level.

Power switching device, three phase bridge inverter, and method of operating a power switching device

A method of switch detection is disclosed that comprises, enabling a low power mode on a switch detection device, activating a first detection circuit for detecting, at a first expiration of a first polling time interval, a first switch state of a first switch having a first priority level, the first switch state including one of a first open state and a first closed state, comparing the detected first switch state with a prior first switch state, and activating a second detection circuit for detecting, at a second expiration of a second polling time interval, a second switch state of a second switch having a second priority level, the second switch including one of a second open state and a second closed state, and the second polling time interval being greater than the first polling time interval, and the second priority level being different from the first priority level.

Switch detection device and method of use

A method of testing a semiconductor device includes forming a test circuit over a semiconductor substrate. The test circuit includes a plurality of interconnects electrically connected to a set of device structures supported by the semiconductor substrate. A test, such as a gate stress or leakage current test, of each device structure is conducted with the test circuit. The plurality of interconnects are removed after conducting the test.

Wafer-level gate stress testing

An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Variable reluctance sensor interface with integration based arming threshold

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Tempe, AZ, United States of America

Randall C Gray