Broadcom Corporation

Other

Sarnoff Corporation

Randall Bret Perlow

Charles Brooks

Tianmin Liu

Steven T Jaffe

Maneesh Goyal

Ramon Alejandro Gomez

Nabil R Yousef

Lin He

Chun-Ying Chen

Mehmet Vakif Tazebay

Loke Kun Tan

Charles A Reed, Jr

Jiangfeng Wu

Binning Chen

Giuseppe Cusmai

Tianwei Li

Cheng-Youn Lu

Peter Cangiane

Hong Liu

Wenbo Liu

Wei-Ta Shih

A later generation display device may be connected to the video output port of an older electronic device which utilized an earlier generation display such as a dot matrix display. The early generation display is replaced with the later generation display. The display device includes software which receives graphic data through the video output port and identifies which frame is currently being streamed. The display device matches the frame being streamed to a stored graphic frame having a higher resolution and/or color. The matched frame is delivered to the later generation device so that the user can experience a higher quality visual effect by retrofitting the older electronic device with the later generation display.

Color display converter for pinball machine

Various multi-lane ADCs are disclosed that substantially compensate for impairments present within various signals that result from various impairments, such as phase offset, amplitude offset, and/or DC offset to provide some examples, such that their respective digital output samples accurately represent their respective analog inputs. Generally, the various multi-lane ADCs determine various statistical relationships, such as various correlations to provide an example, between these various signals and various known calibration signals to quantify the phase offset, amplitude offset, and/or DC offset that may be present within the various signals. The various multi-lane ADCs adjust the various signals to substantially compensate for the phase offset, amplitude offset, and/or DC offset based upon these various statistical relationships such that their respective digital output samples accurately represent their respective analog inputs.

Compensation for lane imbalance in a multi-lane analog-to-digital converter (ADC)

An adaptive receiver is disclosed for optimally receiving and processing signals. The receiver utilizes one or more memory blocks to store groups of incoming symbols. The groups of symbols are processed by a channel estimation subsystem to determine channel characteristics. The receiver determines the appropriate demodulation and decoding strategy to implement based on the determined channel characteristics. The receiver includes a plurality of demodulation and decoding schemes, one of which is selected based on the results of a channel estimation analysis.

System and method for terrestrial high-definition television reception

Color display converter for pinball machines

A method for processing signals in a communication system may include performing by one or more processors and/or circuits integrated within a single digital television (DTV) receiver chip, demodulating a wirelessly received digital inband signal and a wirelessly received digital out-of-band signal. The demodulating may include equalizing the received digital inband signal and the received digital out-of-band signal. The demodulated digital inband signal and the demodulated digital out-of-band signal may be error corrected. One or more TV channels may be generated based on one or both of the error corrected demodulated digital inband signals and/or the error corrected demodulated out-of-band signals. The wirelessly received digital inband signal may include a VSB signal, a NTSC signal and/or a QAM signal. The one or more processors and/or circuits may perform decoding the wirelessly received digital inband signal.

Method and system for an integrated VSB/QAM/NTSC/OOB plug-and-play DTV receiver

Various pipeline ADCs are disclosed that substantially compensate for interference or distortion that results from imperfections with various ADC modules of the pipeline ADCs. The pipeline ADCs include various ADC stages and various compensation stages that are coupled to the various ADC stages. The various ADC stages convert their corresponding analog inputs from an analog signal domain to a digital signal domain to provide various digital output signals and various analog residual signals to subsequent ADC stages. The various compensation stages compensate for interference or distortion that is impressed onto the various analog residual signals which results from imperfections within previous ADC stages.

Successive equalizer for analog-to-digital converter (ADC) error correction

Sparse channel equalization may be achieved by receiving a signal via a multi-path communication channel. The equalization then continues by extracting sparse information regarding the multiple path communication channel from the signal. Such sparse information generally indicates the position of the signals received via each of the multiple paths. The equalization then continues by estimating a channel response of the multiple path communication channel based on the sparse information. The equalization then continues by generating equalization taps (or coefficients) based on the channel response. The equalization then continues by equalizing the signal based on the equalization taps.

Sparse channel equalization

Systems and methods for processing signals in a communication system are disclosed and may include demodulating a wirelessly received inband signal and a wirelessly received out-of-band signal via a DTV receiver. One or more TV channels may be generated based on the demodulation of the wirelessly received inband signal and a wirelessly received out-of-band signal. The received inband signal may include a VSB signal, a NTSC signal and/or a QAM signal. The processing may also include determining whether the wirelessly received inband signal includes an analog signal or a digital signal. The digital signal may be error corrected, and the error corrected digital signal may be equalized. The analog signal may be decoded, and an audio output may be generated based on the decoding of the analog signal.

Certain embodiments of the invention may be found in a method and system for a vestigial side band (VSB), quadrature amplitude modulation (QAM), NTSC, out-of-band (OOB) receiver that is integrated in a single chip. The single chip integrated digital television (DTV) receiver provides plug and play DTV receiver capability for handling both North American digital cable television and digital terrestrial broadcast television compatible systems. The integrated DTV receiver may receive all standard-definition and high-definition digital formats (SDTV/HDTV) and an on-chip NTSC demodulator handles NTSC video. An output of the NTSC demodulator may be directed to an external broadcast television system committee (BTSC) or Zweiton M decoder, or it may be sent to an on-chip audio BTSC compliant decoder. The single chip integrated DTV receiver may also comprise an integrated out-of-band QPSK receiver, which may be adapted to, for example, handle a CableCard compliant with the CableCard Specification.

Determination of equalizer coefficients from a sparse channel estimate begins by determining location of significant taps based on the sparse channel estimate of a multiple path communication channel. The sparse channel estimate indicates the positioning of signals received via the various multiple paths of the channel. The method then continues by determining feed-forward equalization coefficients based on the location of the significant taps. The method then continues by determining feedback equalization coefficients based on the feed-forward equalization coefficients and the sparse channel estimate.

Determine coefficients of a decision feedback equalizer from a sparse channel estimate

A digital television signal is intercepted by a plurality of antennas to produce a corresponding plurality of input signals. The antennas have different directionality so they can be combined in a way that reduces multipath echoes. In one embodiment, the antennas are arranged to operate in a diversity or scanned array mode. In another embodiment, the antennas are arranged to operate in a adaptive phased array mode. The input signals intercepted by the antenna are subjected to vestigial sideband (VSB) processing to produce a single VSB processed signal, which is decoded to form a display drive signal. A plurality of input signals in a VSB receiver having a plurality of antennas with different directionality are evaluated to determine how the input signals should be combined to reduce multipath echoes. The quality of the input signals from the antennas is evaluated at one of a number of different points in the VSB receiver, such as at the outputs of the antennas, the outputs of the VSB processors, or the output of the forward error correction (FEC) decoder. Within the VSB processors themselves, the quality of the input signals can be evaluated at a number of different points, including the outputs at the front end, the outputs at the back end, or inside the back end the outputs at the feed forward equalizer.

Growing community of inventors

San Clemente, CA, United States of America

Randall Bret Perlow