Duke University

Ran Wang

Krishnendu Chakrabarty

Multi-layer integrated circuits having isolation cells for layer testing and related methods are disclosed. According to an aspect, an integrated circuit includes multiple isolation cells. Example isolation cells include, but are not limited to, electronic fuses and tri-state flip-flops. The integrated circuit also includes a first layer having first and second sets of electronic components, the first set of electronic components being operatively connected to the second set of electronic components via the isolation cells. Further, the integrated circuit includes multiple transmission gates associated with the isolation cells. The integrated circuit also includes a second layer having electrical circuitry operatively connected to the electronic components of the first layer. The electrical circuitry is configured to apply test patterns to the electronic components of the first layer. Further, the electrical circuitry is configured to receive test responses from the electronic components of the first layer through the vias.

Multi-layer integrated circuits having isolation cells for layer testing and related methods

Multi-layer integrated circuits having isolation cells for layer testing and related methods are disclosed. According to an aspect, an integrated circuit includes first and second layers that each have one or more electronic components. One or more electronic components of each layer can be electrically connected by a first via and a second via. The integrated circuit also includes an isolation cell operatively connected between the first via and the second via. The isolation cell is configured to controllably break electrical connection between the first via and the second via subsequent to testing of the at least one electronic component of the second layer. Example isolation cells include, but are not limited to, electronic fuses and tri-state flip-flops.

Growing community of inventors

Durham, NC, United States of America

Ran Wang