Mellanox Technologies, Ltd.

Mellanox Technologies Tlv Ltd.

Ran Shani

Zachy Haramaty

Aviv Kfir

Benny Koren

Lion Levi

Matty Kadosh

Ido Bukspan

Oded Wertheim

Idan Matari

Nir Monovich

Carlos Nemerovsky

A network element includes one or more ports for communicating over a network, a processor and packet processing hardware. The packet processing hardware is configured to transfer packets to and from the ports, and further includes data-transfer circuitry for data transfer with the processor. The processor and the data-transfer circuitry are configured to transfer between one another (i) one or more communication packets for transferal between the ports and the processor and (ii) one or more databases for transferal between the packet processing hardware and the processor, by (i) translating, by the processor, the transferal of both the communication packets and the databases into work elements, and posting the work elements on one or more work queues in a memory of the processor, and (ii) using the data-transfer circuitry, executing the work elements so as to transfer both the communication packets and the databases.

Hardware acceleration for uploading/downloading databases

A method of communications at an encapsulating bridge includes receiving a packet having an unencapsulated-DA (destination address) and an associated encapsulation identifier. The unencapsulated-DA and the associated encapsulation identifier are used to determine a TxPort-unencapsulated network (unencapsulated network side transmit port) or an encapsulated-DA for the packet. This method reduces latency of processing by reducing lookups, thereby also increasing transmission bandwidth of the communications network. The invention also facilitates embodiments with reduced memory and processing requirements, as compared to conventional implementations. This method is particularly useful for MAC-in-MAC encapsulation.

Uniting FDB lookups for encapsulated packets

Communication apparatus includes a switch, which includes switching logic, multiple ports for connection to a network, and a management port, and which is configured to assign both a first link-layer address and a second link-layer address to the management port. A host processor includes a memory and a central processing unit (CPU), which is configured to run software implementing a management agent for managing functions of the switch. A network interface controller (NIC) is connected to the management port and is configured to convey incoming management packets, which are directed by the switch to the first link-layer address, to the CPU for processing by the management agent, and to write directly to the memory data contained in incoming remote direct memory access (RDMA) packets, which are directed by the switch to the second link-layer address.

Switch with dual-function management port

Growing community of inventors

Hod Hasharon, Israel

Ran Shani