Microsoft Technology Licensing, LLC

Ran Sahar

Douglas Christopher Burger

Gilad Kirshenboim

Yehonathan Refael Kalim

Methods, systems and computer program products are provided for improving performance (e.g., reducing power consumption) of a hardware accelerator (e.g., neural processor) comprising hybrid or analog multiply and accumulate (MAC) processing elements (PEs). Selective variation of the precision of an array of MAC PEs may reduce power consumption of a neural processor. Power may be conserved by dynamically controlling the precision of analog to digital (ADC) output bits for one or more MAC PEs. Dynamic control of ADC output bit precision may be based on precision information determined during training and/or post-training (e.g., quantization) of an artificial intelligence (AI) neural network (NN) model implemented by the neural processor. Precision information may include a range of dynamic precision for each of a plurality of nodes of a computation graph for the AI NN model.

Analog MAC aware DNN improvement

Apparatus for determining user operation of an actuator, based on determining a time constant of a state circuit coupled to the actuator.

Active stylus

A stylus device for interacting with a computer is disclosed. The stylus device can comprise an operational circuit, an operational switch for activating and deactivating the operational circuit, and a driving and sensing circuit configured for driving a voltage supply to the operational circuit and sensing a state of the operational switch, wherein the driving and the sensing are executed intermittently on an electrical conductor.

Stylus with intermittent voltage driving and sensing

A driver circuit for voltage boosting comprises a plurality of circuit cells, each configured to amplify voltage applied thereto; and a plurality of inter-cell switching circuits, arranged to controllably concatenate the cells in series such that, for any pair of adjacent cells, voltage amplified by one cell of the pair is applied, via a respective inter-cell switching circuit, to another cell of the pair. At least one of the inter-cell switching circuits comprises a transistor and a capacitor connected in parallel to each other such that a source-gate voltage of the transistor equals a voltage drop on the capacitor at all times.

Growing community of inventors

Natania, Israel

Ran Sahar