Hewlett-packard Company

Other

Hewlett-packard Development Company, L.P.

Shell Oil Comapny

Hewlett Packard Enterprise Development LP

Ran-Fun Chiu

Mehrban Jam

Sui-hing Leung

Richard A Baugh

Ning Bi

James Scott Hiscock

Sujata Banerjee

Charles E Moore

Travis N Blalock

Rajeev Badyal

Paul T Congdon

Kyu Han Kim

Richard A Baumgartner

Larry S Metz

Thomas M Walley

Li Ching Tsai

Robert A Zimmer

James S Ignowski

Kenneth R Stafford

David M Cook

Merban Jam

Darlene L Hart

An electronic device has a plurality of environments including respective communication stacks. The environments correspond to respective different user personas. Data associated with the different user personas are communicated in corresponding separate transport flows over the network.

Communicating data associated with different personas of a user

Methods and apparatus are provided related to seismic sensor data. Seismic sensor signaling is digitally sampled in accordance with a local clock and without synchronization to standardized time. Timestamp data is used to synthesize data correspondent to an artificial stimulus waveform. Cross-correlation of the synthesized data with the seismic sensor data yields a correlation result. The correlation result can be scaled to an original starting time for the seismic data sampling. The scaled correlation result can be stored in computer-accessible media and subject to further processing or interpretation.

Seismic data apparatus and methods

The present invention provides methods for address and name discovery for Ethernet entities. In one aspect, a method is provided for discovering an Ethernet address of a target device in a network having a plurality of devices. The method uses a device name of the target device. A broadcast Ethernet packet includes a source address field and a payload field, the source address field including an Ethernet address of an initiator and the payload field of the broadcast Ethernet packet includes the device name of the target device. The Ethernet packet is broadcast over the network to each device in the network including the target device. The broadcast Ethernet packet is ignored at the devices other than the target device. A response Ethernet packet is received from the target device. The response Ethernet packet includes a destination address field with the Ethernet address of the initiator. The response Ethernet packet also includes the Ethernet address of the target device. In another aspect, a method is provided for name discovery.

Methods for address and name discovery for Ethernet entities

A computer network for high-speed data communication, has a data transmission cable with a root and at least one leaf node wherein the upstream transmission is synchronized by information received on a downstream channel. Each client station receives data on a first frequency band, and transmits data on a second frequency band according to synchronization signals received on the first frequency band. The client station's transmission packets may include requests for reserved slots on the second frequency band for subsequent transmissions, and the SCS has a scheduler operable to determine a start time for requested reserved slots, and transmits the start time for the requested reserved slots. The client stations are operable to wait to continue transmission after waiting for the start time.

Communications system including synchronization information for timing

A computer network for high-speed data communication, has a data transmission cable with a root and at least one leaf node. A signal conversion system (SCS) is attached to the root, and at least one client station is attached to a leaf node. The SCS consists of a transmitter that transmits down-stream data onto said cable in a first frequency band; and a receiver that receives data from said client stations on a second frequency band; wherein said down-stream data includes synchronization and acknowledgement signals. Each client station has a receiver that receives data on said first frequency band, and a transmitter that transmits data on a second frequency band according to synchronization signals received on said first frequency band. The computer network is controlled by a method comprising transmitting down-stream from the signal conversion system (SCS) a control signal having synchronization information on a first frequency band, receiving said control signal at client stations, transmitting up-stream from said client stations to said SCS on a second frequency band, the transmission being timed with respect to said synchronization information, and acknowledging on said first frequency band successful receipt by said SCS of said up-stream transmission. The client station's transmission packets may include requests for reserved slots on said second frequency band for subsequent transmissions, and the SCS has a scheduler operable to determine a start time for requested reserved slots, and transmits the start time for the requested reserved slots. The client stations are operable to wait to continue transmission until after waiting for the start time. Other systems and methods are disclosed.

High-speed data communications modem

Communications network system including acknowledgement indicating

An analog, fully integrated, partial response maximum likelihood (PRML) read channel utilizing a high-performance analog delay line, an analog adaptive equalizer and an analog Viterbi detector is provided, resulting in saved space, performance gains, and lower power consumption. For signal detection and reconstruction used in read operations, the partial response maximum likelihood (PRML) read channel includes a variable gain amplifier coupled to a lowpass filter for input to an adaptive analog equalizer. The adaptive analog equalizer comprises an analog delay line and an analog feedforward equalizer (FFE). An analog Viterbi detector employs maximum-likelihood sequence estimation (MLSE) techniques to performs the signal detection function. A decoder/descrambler produces a final reconstructed signal. The analog implementation of a partial response maximum likelihood (PRML) read channel also includes a scrambler/encoder coupled to a write precompensation circuit for output to a separate write head.

Analog implementation of a partial response maximum likelihood (PRML)

A system and method for collision resolution in a communication system having multiple transmission stations communicating on a shared slotted communication channel. The system and method includes a procedure for organizing the stations in a structure wherein each station has a fixed address corresponding to a static location in the structure. The procedure further indicates to the multiple transmission stations a slot type for each communication slot, the slot type selected from a group including contention slot type and reservation slot type, and accepts transmissions of contention slot data packets in contention slots on the communication channel from the stations, the contention slot data packets each optionally containing a reservation quantity for reservation slot data packets to be sent by an originating station upon successful transmission of a contention slot data packet originating at the originating station, the reservation slot data packets transmitted in reservation slots dedicated to the originating station. The procedure detects collisions in the transmissions of packets originating from the transmitting station with packets transmitted from other transmitting stations; and upon detecting a collision in a contention slots, recursively entitles a subset of the locations in the structure to transmit in the subsequent contention slot regardless of whether the station transmitted during the contention slot in which the collision occurred, wherein membership in the subset indicates that a station corresponding to a location in the subset is entitled. Further systems and methods are disclosed.

Shared communications channel with enhanced reservation and collision

Signal processing system for reducing error due to intersymbol interference and other noise, the system having a feedforward equalizer adaptively responsive to a first error signal (e.sub.n) and having a noise decorrelator adaptively responsive to an adjusting signal (q.sub.n) derived from the first error signal. In a preferred embodiment the source of the signal (S.sub.n) is a magnetic disk having encoded data thereon. The feedforward equalizer reduces intersymbol interference. A decision device connected to the feedforward equalizer is coupled to connect the signal (X.sub.n) from the feedforward equalizer into a stream (d.sub.n) of data samples having a limited number of predetermined signal levels. The first error signal is the difference between signal levels of data samples in the stream and the output of the feedforward equalizer. The first error signal is utilized to adjust the feedforward equalizer and to provide an input to the noise decorrelator. The noise decorrelator is an adaptive multi-tap assembly having a summing junction at the decorrelator output to provide a predicted noise signal (e.sub.pn) to the output signal of the feedforward equalizer. The adjusting signal which adaptively adjusts tap weights of the noise decorrelator is the difference between the first error signal and the predicted noise signal.

Signal processing system for adaptive equalization

A technique for eliminating unwanted dc offset voltages in a receiver for decoding a plurality of multilevel digitally modulated signals. The data transmission system is arranged to send a particular preamble signal each time a different data source begins transmission of its data. The preamble signal produces at the receiver output multiple cycles of maximum level excursions. During the period of time that the preamble signal is received, a signal processor in the receiver determines an initial dc offset value by averaging the level of the received digitally modulated signal. After the transmission of the preamble, the signal processor continually generates updated dc offset voltages which are equal to the sum of the previously generated dc offset voltage and the difference between the amplitude level represented by the received digitally modulated signal and the amplitude level of the closest 'coding' amplitude level; the difference being multiplied by a scaling factor. Once a scaling factor is applied to the updated dc offset value, the result is added to the previous dc offset voltage. And, the process is continually repeated to produce updated dc offset voltages.

Method and apparatus for DC restoration in digital receivers

Growing community of inventors

Los Altos, CA, United States of America

Ran-Fun Chiu