Racal-milgo Limited

Racal Data Communications Inc.

Ran F Chiu

Philip F Kromer, Iii

Henry H Parrish

Ming L Kao

William J Miller

Yoon B Park

Frank W Newdeck

David E Nizel

Richard B Joerger

An apparatus for use in transmitting compressed digital voice data includes an analyzer for compressing digitized voice data according to an algorithm which produces a root mean square of the voice data. An analog to digital converter is used to convert analog voice signals to digital data as an input to the analyzer. An AGC circuit controls to analog voice signal to keep it within predetermined limits for digitization, with the AGC setting being determined by the root mean square of the digitized data. The digitized data includes data representative of the root mean square adjusted by the inverse of the change induced by the AGC. A speech synthesizer expands the digitized data at a remote location to convert it back to analog speech signals.

Digital voice compression having a digitally controlled AGC circuit and

An automatic adaptive equalizer operative on a test pattern including a carrier-only period, clock-only period and a single test impulse. The equalizer employs a transversal filter under control of a microprocessor. Samples of in-phase and quadrature phase components of the received impulse response are cross correlated and autocorrelated to form elements of a complex matrix equation describing the optimum equalizer tap settings. The microprocessor performs a special interative operation utilizing elements of this equation to rapidly and exactly calculate the optimum initial settings for the tap constants. The clock-only portion of the test pattern is analyzed to accurately set a sampling clock to properly sample the received impulse so that matrix formation can be carried out within the duration of the received impulse. Initial equalization can be achieved in a time on the order of 30 milliseconds at a data rate of 9600 bits per second.

Fast learn digital adaptive equalizer

An automatically adjusted equalizer circuit includes an operational amplifier having a parallel resonant circuit, a voltage controlled resistor, and an amplifier output signal monitoring circuit in a feedback path for the adjustable equalizer. The presence of the parallel resonant circuit in the feedback path causes the amplifier gain to vary with frequency. An input signal to the operational amplifier will be distorted depending upon the particular loss characteristic of a telephone wire to which the input is connected. Automatic adjustment of the voltage controlled resistor, and the presence of the resonant circuit, causes the slope of the gain of the amplifier to inversely compensate for the loss characteristic of the particular line in question. Within the variety of lines, each line will have different loss characteristics as a function of length and gauge of the different telephone lines. This equalizer automatically provides a compensated output signal which is equalized for the particular loss characteristic of the line selected from such a variety of lines.

Adaptive equalizer for short distance metallic circuits

Circuitry for detecting and correcting false equilibrium conditions generated in data modems by sudden changes in gain of an associated transmission system including a false gain detector which detects a low rate of production of symbols of largest magnitude and triggers a final gain circuit which initially jumps the overall system gain and thereafter adaptively adjusts the gain jump to the correct value.

Data modem false equilibrium circuit

A circuit for maintaining proper sampling timing in a data modem wherein main channel equalizer error is correlated with a derivative channel signal to drive a clock correction signal. The derivative channel signal is derived from an equalizer using fewer coefficients than required to derive the main channel equalized signal, and calculation of the equalized derivative and clock correction signal is performed only once every other Baud.

Sampling clock correction circuit

An automatic gain control circuit having a coarse analog gain adjustment section producing discrete increments of db gain and a fine digital gain adjustment section. The digital section provides for adjustment of gain through a final increment of db gain to achieve precise gain setting. The output of the digital section is squared and compared to a reference signal to derive an error signal whose value is fed to an apparatus which iteratively determines the precise coarse increment and fine digital settings to achieve the final desired gain setting.

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Miami, FL, United States of America

Ran F Chiu