Centre National De La Recherche Scientifique

Université Pierre Et Marie Curie (paris 6)

Sorbonne Université

Université Pierre Et Marie Curie

Ramy Iskander

Farakh Javid

Marie-Minerve Louerat

Andreas Kaiser

Hao Zou

Yasser Moursy

Some embodiments are directed to the design and manufacture of integrated circuits, and more particularly, some embodiments are directed to the electrical modeling of integrated circuits combining high voltage power devices with low voltage control logic blocks, and even more particularly, some embodiments are directed to the modeling of substrate coupling effects in these circuits.

Method for generating an electronic circuit modelling substrate coupling effects in an integrated circuit

A method is provided for providing an automated assistance to design an analog non linear circuit under transient conditions, and to a corresponding system. The method enables the circuit designer to consider with simulation the time reactive effects of generally nonlinear components, while keeping the significant and intuitive qualities of an analysis view design tool like the CAIRO+/CHAMS environment. The method includes at least a transient instant solving procedure producing a numerical simulation that uses a given set of sizes and biases to provide a set of local behavior parameters in at least one node at current time. This transient instant solving procedure includes an incremental iteration under transient conditions of an evaluation in an analysis view of a dependency graph of the functional structure of the circuit. An optional transient analysis performs a numerical simulation to provide a time dependent behavior simulation of the circuit, and a performance evaluation.

Method for automated assistance to design nonlinear analog circuit with transient solver

A method for determining electrical parameter values of the transistors of an analog circuit of a system on chip includes breaking the circuit down into a set of blocks connected to one another; establishing the wiring diagram of said circuit; defining a set of electrical constraints that are specific to said circuit, blocks and transistors of each block; defining electrical parameters of the circuit, block and transistors; selecting for each transistor of the circuit an operator for calculating the electrical parameter values of said transistor; generating structured diagrams of each block of the circuit from the defined constraints and the chosen operators; assembling said structured diagrams of blocks into a general diagram of the circuit; identifying whether there is any conflict; and, if so, emitting an alarm signal.

Method for determining the sizing of the transistors of an analog circuit

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Paris, France

Ramy Iskander