Intel Corporation

Agere Systems Inc.

Lsi Corporation

Avago Technologies General IP (singapore) Pte. Ltd.

Ramon Sanchez

Kameran Azadet

Albert Molina

Daniel Gruber

Martin Clara

Samer Lutfi Hijazi

Sunitha Kopparthi

Kannan Rajamani

Matteo Camponeschi

Marc Jan Georges Tiebout

Kevin R Kinney

Oisin Ó Cuanacháin

Joe H Othmer

Hazar Yuksel

A processing device is provided. The processing device comprises one or more interfaces configured to transmit information to a nonlinear device and processing circuitry configured to control the one or more interfaces and to. Further, the processing circuitry is configured to transmit an excitation signal to the nonlinear device and to receive response information from the nonlinear device. Further, the processing circuitry is configured to determine a linear response of the nonlinear device based on the response information and to determine a nonlinear response of the nonlinear device based on the determined linear response.

Processing device, transmitter, base station, mobile device, method and computer program

A system and method for digital correction for a dynamically varying non-linear system. The system includes a correction circuitry including at least one look-up table (LUT). The correction circuitry is configured to receive an input signal and modify the input signal to be processed by the non-linear system using at least one LUT to correct non-linearity incurred by the non-linear system. The at least one LUT is addressed by a magnitude or power of the input signal and a dynamically varying parameter associated with the input signal. The dynamically varying parameter may be one of average signal power of the input signal, a differential of the average power of the input signal, a directional beam index, or temperature.

Method and system for digital correction for a dynamically varying non-linear system

An apparatus for correcting a mismatch between a first segment and a second segment of a Digital-to-Analog Converter, DAC, is provided. The first segment generates a first contribution to an analog output signal of the DAC based on a first number of bits of a digital input word for the DAC converter, and the second segment generates a second contribution based on a second number of bits. Further, the apparatus comprises a first processing circuit for the first number of bits comprising a first filter configured to modify the first number of bits to generate first modified bits, and a second processing circuit comprising a second filter to modify the second number of bits to generate second modified bits. The apparatus additionally comprises an output configured to output a modified digital input word for the DAC, which is based on the first modified bits and the second modified bits.

Apparatus for correcting a mismatch, digital-to-analog converter system, transmitter, base station, mobile device and method for correcting a mismatch

A digital predistortion system and method for pre-distorting an input to a non-linear system. The digital predistortion system includes a digital predistortion circuit and a memory. The digital predistortion circuit is configured to receive input data and modify the input data using at least one look-up table. The at least one look-up table is addressed by a signed real value of the input data. The memory is configured to store the at least one look-up table. The at least one look-up table is implemented based on a generalized memory polynomial model.

Method and system for digital pre-distortion using look-up table

A digital-to-analog conversion system is provided. The digital-to-analog conversion system includes a digital-to-analog converter configured to receive a pre-distorted digital signal from a digital circuit, and to generate an analog signal based on the pre-distorted digital signal. Further, the digital-to-analog conversion system includes a feedback loop for providing a digital feedback signal to the digital circuit. The feedback loop includes an analog-to-digital converter configured to generate the digital feedback signal based on the analog signal, and wherein a sample rate of the analog-to-digital converter is lower than a sample rate of the digital-to-analog converter.

Digital-to-analog conversion system

A digital-to-analog converter is provided. The digital-to-analog converter includes a first plurality of digital-to-analog converter cells configured to generate a first analog signal. Further, digital-to-analog converter includes a second plurality of digital-to-analog converter cells configured to generate a second analog signal. The first analog signal and the second analog signal form a differential signal pair. Further, the digital-to-analog converter includes a transmission line transformer comprising a first input node coupled to the first plurality of digital-to-analog converter cells, a second input node coupled to the second plurality of digital-to-analog converter cells, and a first output node. The transmission line transformer is configured to present a first impedance at the first and second input nodes and to present a second impedance at the first output node.

Digital-to-analog converter

An apparatus and method for analog-to-digital conversion. The apparatus includes a first analog-to-digital converter (ADC), a second ADC, and a calibration unit. The first ADC is configured to sample an input analog signal at a first sampling frequency. The second ADC is configured to sample the input analog signal at a second sampling frequency. The second sampling frequency is a fraction of the first sampling frequency. The calibration unit is configured to correct a distortion incurred in an output of the first ADC based on an output of the second ADC. The first ADC may be a time-interleaved ADC. The second ADC may be an extra sub-ADC of the time-interleaved ADC. The second ADC may be configured to sample the input analog signal at random sampling phases. A dithering noise may be added to the input analog signal of the second ADC. The calibration unit may be a non-linear equalizer.

Apparatus and method for analog-to-digital conversion

A digital-to-analog converter is provided. The digital-to-analog converter comprises an input configured to receiving a first digital control code for controlling a plurality of digital-to-analog converter cells. Further, the digital-to-analog converter comprises a code converter circuit configured to converter the first digital control code to a second digital control code. Further, the digital-to-analog converter comprises a shift code generation circuit configured to generate a shift code based on a code difference between the first digital control code and a third digital control code. The digital-to-analog converter additionally comprises a bit-shifter circuit configured to bit-shift the second digital control code based on the shift code in order to obtain a modified second digital control code. The digital-to-analog converter comprises a cell activation circuit configured to selectively activate one or more of the plurality of digital-to-analog converter cells based on the modified second digital control code. Each activated digital-to-analog converter cell is configured to output a respective cell output signal. Further, the digital-to-analog converter comprises an output configured to output an analog output signal based on the cell output signals.

Digital-to-analog converter, transmitter, base station and mobile device

Techniques for generating signals with arbitrary noise shaping are discussed. One example apparatus configured to be employed within a transmitter can comprise a noise shaper configured to: receive an input signal x; and apply noise shaping to the input signal xto generate a noise shaped output signal y, wherein an in-band noise of the noise shaped output signal yis below an in-band noise threshold of a spectral mask associated with the noise shaper, wherein an out-of-band noise of the noise shaped output signal yis below an out-of-band noise threshold of the spectral mask, and wherein a noise of the output signal yin each of a plurality of bandpass regions is below an associated noise threshold for that bandpass region of the spectral mask.

Arbitrary noise shaping transmitter with receive band notches

Methods and apparatus are provided for simultaneous estimation of frequency offset and channel response for a communication system, such as a MU-MIMO communication system. An iterative method is provided for estimating frequency offset and channel response for a plurality of frequency resources. The channel response is estimated for a set of users sharing a given one of the frequency resources. In addition, the frequency offset is estimated for the users in the set, wherein the channel response and frequency offset of users not in the set are maintained at their latest updated values. Initially, the channel response of a user can be an ideal channel response and the frequency offset can be approximately zero.

Methods and apparatus for simultaneous estimation of frequency offset and channel response for MU-MIMO OFDMA

One embodiment is an apparatus having a memory, a controller, and a de-interleaving module. The memory is configured to store portions of a set of interleaved values, where the set of interleaved values correspond to a single application of an interleaving mapping to a set of un-interleaved values. The controller is configured to retrieve each portion from an other memory that stores the set of interleaved values by moving the portion from the other memory to the memory. The de-interleaving module is configured to de-interleave the interleaved values in at least one of the portions to generate a de-interleaved portion such that processing downstream of the de-interleaving module can begin processing the de-interleaved portion before all of the interleaved values in the set of interleaved values are de-interleaved by the de-interleaving module.

De-interleaving on an as-needed basis

In one embodiment, a receiver is provided for use in a multiple-input system that includes a receiving antenna receiving a time-domain signal corresponding to a plurality of signals transmitted from a plurality of transmitting antennas. The receiver includes: (a) a transform unit adapted to transform the time-domain signal into a frequency-domain signal; (b) a channel estimation unit adapted to estimate, based on the frequency-domain signal and a frequency-domain pilot signal, a combined transfer function corresponding to a plurality of transfer functions of respective channels between the plurality of transmitting antennas and the receiving antenna; and (c) a channel separation unit including a plurality of frequency-domain convolution units that separate the combined transfer function into a plurality of estimated channel transfer functions.

Method for estimating a plurality of estimated transfer functions corresponding to wireless channels in a multiple-input system

In a communication receiver, timing recovery circuitry includes a loop filter associated with a timing recovery loop of a first communication device. The first communication device is in communication with a second communication device prior to a temporary power down/power up sequence in the first communication device. The loop filter is configured to: (i) temporarily disable at least a portion of the timing recovery loop after the temporary power down/power up sequence in the first communication device; and (ii) initiate a progression through a set of potential sampling phases to determine a given sampling phase at which the first communication device can recommence communication with the second communication device.

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Madrid, Spain

Ramon Sanchez