Intel Corporation

Ramnarayanan Ram Muthukaruppan

Tarun Mahajan

Pradipta Patra

Uday Bhaskar Kadali

Harish Krishnamurthy

Srinath B Pai

Mohit Verma

Rajesh Sidana

Gaurav Goel

Rupak Ghayal

Raghu Chepuri

Dheeraj Kumar Shetty

Santosh Nene

Venkataraman Srinivasan

Srinivasulu Malepati

Nicholas Paul Cowley

Amit Kumar Srivastava

Atul S Kumar

George Matthew

Anoop Kumar Upadhyay

Pradyumna Agashe

Jnaneshwar Madugonda

Santhosh Nen

Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.

Adaptive digital controller including linear and non-linear control mechanism

Described are apparatuses and methods for power management. The apparatus may include a power gate including a plurality of current sources. The power gate may be coupled to a load. The apparatus may further include a voltage control circuit, coupled to the power gate, to determine and select one or more current sources of the plurality of current sources to supply to the load. The apparatus may further include a current control circuit, coupled to the voltage control circuit, to control individual current sources of the one or more current sources to output a constant current. Other embodiments may be described and/or claimed.

Apparatus and method for power management with a two-loop architecture

A configuration interface bus may be coupled to components of a physical layer (PHY) device. A configuration controller may be coupled with the configuration interface bus and may receive an input signal representing a power state of the PHY device. The configuration controller may further identify a set of instructions that correspond to the input signal and may transmit configuration data via the configuration interface bus to one or more of the components of the PHY device in response to an execution of the set of instructions. The operation of the one or more components of the PHY device may be based on the configuration data.

Controller to transmit data for components of a physical layer device

Described is a voltage regulator with adaptive gain, which comprises: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a load, and to receive a second power supply as input; an analog-to-digital converter (ADC) to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative of the first power supply and to generate the digital bus for controlling the plurality of power-gate transistors such that a transfer function of the plurality of power-gate transistors is substantially linear over an operating range.

Digital synthesizable low dropout regulator with adaptive gain

An apparatus is provided which comprises: a first clock line to provide a first clock; a second clock line to provide a second clock; a delay line having a plurality of delay cells, wherein the delay line is coupled to the first and second clock lines, wherein the first clock is to sample the second clock; and circuitry coupled to the delay line, wherein the circuitry is to determine first or latest edge transitions from the outputs of the plurality of delay cells.

Time-to-digital converter

Described is an apparatus which comprises: an output node; a capacitor; an inductor having a first terminal coupled to the output node, and a second terminal coupled to the capacitor; a bridge to receive an input power supply and to generate a switching voltage signal at the output node; and a current sensor to determine slope of the switching voltage signal on the output node.

Digital current sensor for on-die switching voltage regulator

Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors.

Multiple voltage identification (VID) power architecture, a digital synthesizable low dropout regulator, and apparatus for improving reliability of power gates

Some embodiments include apparatus and methods having a node to provide a signal, and a control unit arranged to control a value of an output voltage at an output node on an output path based on a duty cycle of the signal and a value of an input voltage. The control unit can also be arranged to cause a change in a resistance on the output path in order to determine a value of a current on the output path based at least on the change in the resistance.

Digital current sensing in power controller

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Ka, India

Ramnarayanan Ram Muthukaruppan