Sandisk Technologies Inc.

Western Digital Technologies, Inc.

Ramkumar Subramanian

Piyush Girish Sagdeo

Mahim Raj Gupta

Jayavel Pachamuthu

Lior Avital

Aspects of a storage device are provided for handling GBBs with defects between global interconnects and local word lines. The storage device includes a plurality of blocks each including a plurality of word lines, a plurality of interconnects within an interconnect set and between multiple ones of the blocks, volatile memory, and a controller. The controller determines a logical address pattern associated with the multiple ones of the blocks respectively including a program failure, determines whether the logical address pattern is associated with the interconnect set for the multiple ones of the blocks, determines a common word line associated with the program failures in the multiple ones of the blocks, un-marks these blocks as GBBs, and refrains from programming the common word line during respective program operations in the multiple ones of the blocks. Thus, blocks may be reclaimed, defective word line(s) isolated, and likelihood of read-only modes reduced.

System recovery during CGI-WL defect

A data storage device includes a memory device having a plurality of blocks and a controller coupled to the memory device. The controller is configured to determine that an uncorrectable error correction code (UECC) failure has occurred to a block of the plurality of blocks, enable a UECC anti-strike mechanism, and erase the block. The UECC anti-strike mechanism comprises converting a read failure associated with the block to an erase failure. The controller is further configured to retire the block upon determining that the erase is unsuccessful.

UECC failure handling method

A non-volatile memory system erasing groups of connected memory cells separately performs erase verify for memory cells connected to even word lines to generate even results and erase verify for memory cells connected to odd word lines to generate odd results. The even results and the odd results are used to determine if the erase verify process indicates that the erasing has successful completed. In addition, for each group of connected memory cells, a last even result for the group is compared to a last odd result for the group. Even if the erase verify indicated that the erasing has successfully completed, the system may determine that the erasing failed (i.e. due to a defect) if the number of groups of connected memory cells that have the last even result different than the last odd result is greater than a limit.

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Pleasanton, CA, United States of America

Ramkumar Subramanian