Cirrus Logic Inc.

Koninklijke Philips Corporation N.v.

Cirrus Logic International Semiconductor Limited

Ramin Zanbaghi

John L Melanson

Eric Kimball

Cory Jay Peterson

Chandra Prakash

Aaron J Brennan

Daniel John Allen

Rahul Singh

Aniruddha Satoskar

Anand Ilango

Yousof Mortazavi

Siddharth Maru

Firas Azrai

Kyehyung Lee

Arnab Dutta

Thirumalai Rengachari

Anuradha Parsi

Eric Jerome King

Tejasvi Das

Edmund Mark Schneider

Prashanth Drakshapalli

Jieyeon Choi

Dejun Wang

Axel Thomsen

Michael Allan Kost

Johann Guy Gaboriau

Lingli Zhang

Vamsikrishna Parupalli

Daniel J Allen

Akshay Godbole

Stephen Timothy Hodapp

Ravi Kishore Kummaraguntla

Justin Richardson

Aaron Brennan

Arashk Norouzpourshirazi

Christophe J Amadi

Mikel Ash

Kan Wang

Terence C Bowness

Wei Xu

Dhrubajyoti Dutta

Kim Huynh

Siladitya Dey

Sai Srujana Vuppala

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a plurality of sensors, each sensor configured to sense a current associated with a respective one of the first high-side switch, second high-side switch, first low-side switch, and second low-side switch. The system may also include short-circuit detection circuitry configured to determine a presence and a location of a short circuit in the Class-D stage based on the sensed currents.

Driver stage short circuit detection

Amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include multiple driver circuits and a control circuit. The control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits, according to an input signal to be reproduced by one or more of the multiple amplifier driver circuits. The control circuit determines a splice point at which the control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits.

Splice-point determined zero-crossing management in audio amplifiers

A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M different combinations, to connect N/2 of the N CEs to form a first composite CE and to connect a remaining N/2 of the N CEs to form a second composite CE. Sequentially in time, for each combination of the M combinations, the switches are configured to form the first and second composite CEs according to the combination and a characteristic of the circuit is measured that includes the formed first and second composite CEs. The characteristic indicates how well the formed composite CEs match. A final combination of the M combinations is chosen whose measured characteristic indicates a best match and the final combination is used to configure the switches to form the composite CEs.

Circuit element pair matching method and circuit

A system may include a sampling capacitor and a switch network. The switch network may include one or more first sampling switches electrically coupled to the sampling capacitor and configured to be activated during a first phase of a sampling cycle of the system and one or more second sampling switches electrically coupled to the sampling capacitor and configured to be activated during a second phase of the sampling cycle, wherein the switch network is configured to reset the sampling capacitor to a data-independent and/or signal-independent charge during a reset phase of the sampling cycle.

Data-dependent glitch and inter-symbol interference minimization in switched-capacitor circuits

A system may include an electromagnetic load, a driver configured to drive the electromagnetic load with a driving signal, and a processing system communicatively coupled to the electromagnetic load and configured to, during a haptic mode of the system couple a first terminal of the electromagnetic load to a ground voltage and cause the driving signal to have a first slew rate, and during a load sensing mode of the system for sensing a current associated with the electromagnetic load, couple the first terminal to a current-sensing circuit having a sense resistor coupled between the first terminal and an electrical node driven to a common-mode voltage and cause the driving signal to have a second slew rate lower than the first slew rate.

Slew control for variable load pulse-width modulation driver and load sensing

A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.

Common-mode compensation in a multi-level pulse-width modulation system

A method for use in an analog circuit having a plurality of differential pairs of elements, wherein for each pair of the plurality of differential pairs of elements, the elements of the pair are designed to match but may have mismatch that induces error. The method includes, for each pair of at least two pairs of the plurality of differential pairs of elements: spectrally separating the mismatch-induced error of the pair from mismatch-induced error of a remainder of the plurality of differential pairs of elements, monitoring, by an analog-to-digital converter (ADC), an output of the analog circuit, and analyzing the monitored output to measure the mismatch-induced error of the pair.

Analog circuit differential pair element mismatch detection using spectral separation

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.

Common-mode leakage error calibration for current sensing in a Class-D stage using a pilot tone

Class-D amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include a first H-bridge driver circuit and a second H-bridge driver circuit. The class-D amplifier circuits also include a control circuit having an input for receiving an input signal to be reproduced by the class-D amplifier circuit. The control circuit has outputs coupled to inputs of the first and second H-bridge drivers, and includes one or more modulators. The control circuit selects between actively operating a selected one of the driver circuits or both, according to the signal to be reproduced, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.

Zero-crossing management in Class-D audio amplifiers

A delta-sigma modulator may include a loop filter, a quantizer, an input gain element having a programmable input gain and coupled between an input of the delta-sigma modulator and an input of the loop filter, a feedforward gain element having a programmable feedforward gain and coupled between the input of the delta-sigma modulator and an output of the loop filter, and a quantizer gain element having a quantizer gain and coupled between the output of the loop filter and an input of the quantizer. The programmable input gain is controlled in order to control a variable gain of the delta-sigma modulator. The programmable feedforward gain is controlled to be equal to the ratio of the programmable input gain and the quantizer gain such that the delta-sigma modulator has a fixed phase response.

Analog-to-digital converter-embedded fixed-phase variable gain amplifier stages for dual monitoring paths

Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.

Ratiometric current-monitor sense resistance mismatch evaluation and calibration

Class-D amplifiers and modulators therefor provide control of the DC operating point of the outputs of the amplifiers. The modulators generate a sum and difference signal using combiners and introduce the sum signal to a reference input of the quantizer, while the quantization input of the quantizer receives the difference signal. A difference mode loop filter circuit may filter the difference signal and a common mode loop filter may filter the sum signal. Outputs of the quantizer operate a pair of switching circuits to provide either a differential output with the sum signal set to a constant voltage and the difference signal provided by the signal to be reproduced, or a pair of single-ended outputs with the individual input signals used to generate the sum and difference signal, and selection of a differential or dual single-ended operating mode may be performed by a control circuit that reconfigures the combiners.

Dual-channel class-D audio amplifier having quantizer-combined orthogonal modulation

A system may include an output driving stage comprising a first switch configured to selectively open and close an electrical path between a first supply voltage and an output terminal of the output driving stage and a second switch configured to selectively open and close an electrical path between a second supply voltage and the output terminal of the output driving stage, wherein the second supply voltage is lower than the first supply voltage. The system may also include detection and protection circuitry configured to monitor a physical quantity indicative of the second supply voltage and responsive to the physical quantity exceeding an overvoltage threshold, electrically isolate the output terminal from the second supply voltage.

Detection and protection of short between power supplies in a Y-bridge driver

A class-D amplifier includes a first differential modulator circuit, a first driver circuit including a first high-side switch and a first low-side switch. An input of the first driver circuit may be coupled to a first output of the first differential modulator circuit so that the first differential modulator circuit controls the first driver circuit. The class-D amplifier may also include a second driver circuit including a second high-side switch and a second low-side switch coupling the second and control logic that selects between a single-ended operating state and a differential operating state of the class-D amplifier circuit. The control logic may selectively determine the input of the second driver circuit in conformity with a current operating state of the class-D amplifier circuit so that the first differential modulator circuit controls the second driver circuit when the differential operating state is selected.

Common mode output voltage biasing in class-D audio amplifiers having selectable differential or dual single-ended operation

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

Common-mode insensitive current-sensing topology in full-bridge driver with high-side and low-side energy matching calibration

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Austin, TX, United States of America

Ramin Zanbaghi