Silicon Laboratories Inc.

Ramin Khoini-Poorfard

Alessandro Piovaccari

Mustafa H Koroglu

Abdulkerim Coban

Aslamali A Rafi

David S Trager

Andrew W Krone

Ruifeng Sun

Pio Balmelli

Yu Su

Vitor Pereira

Peter Vancorenland

Douglas R Frey

Krishna Pentakota

Sherry Xiaohong Wu

Alan F Hendrickson

Abhishek Kammula

James T Kao

David Le Goff

András Vince Horvath

Chunyu Xin

Michael R May

Antonio Torrini

Terry Lee Dickey

Frederick Rush

Sebastian Ahmed

Mitchell Reid

Adrian Maxim

Pascal Blouin

Henry William Singor

Jason Christopher Rock

Qi Cai

Eric Mauger

Jean-Marc Guyot

A system and method of keyword spotting using two neural networks is disclosed. The system is in sleep mode most of the time, and wakes up periodically. Upon waking, a limited duration of audio is examined. This may be performed using an auxiliary neural network. If any audio activity is detected in this duration, the system fully wakes and examines a longer duration of audio for keywords. The keyword spotting is also performed by the main neural network, which may be a convolutional neural network (CNN).

Keyword spotting using machine learning

A system and method of minimizing interference and retries in an environment where two or more network protocols utilize the same frequency spectrum is disclosed. A lower-power network controller is co-located with a WIFI controller. The lower-power network controller parses incoming packets as they are received and generates a request signal once it is determined that the incoming packet is destined for this device. This maximizes the likelihood that no WIFI traffic will occur while the incoming packet is being received.

ZigBee, thread and BLE co-existence with 2.4 GHz WiFi

In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These tuners may include different frequency synthesizers including voltage controlled oscillators (VCOs) to generate VCO signals at different frequencies, mixers to downconvert the RF signals to baseband signals using the VCO signals. In an implementation, the semiconductor die may further include shared circuitry coupled to the tuners to digitize, process and demodulate the baseband signals.

Multi-standard, multi-channel expandable TV/satellite receiver

A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops.

Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation

In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.

Configurable buffer for an integrated circuit

In one form, an integrated receiver includes a tracking bandpass filter, a tunable lowpass filter, and a mixer formed on a single integrated circuit chip. The tracking bandpass filter has an input for receiving a radio frequency (RF) input signal, and an output, and comprises a variable capacitor having a capacitance that varies in response to a bandpass frequency control signal, in parallel with an integrated inductor. The integrated inductor comprises a plurality of windings formed in a plurality of metal layers. The tunable lowpass filter has an input coupled to the output of the tracking bandpass filter, and an output and having a tuning input for receiving a cutoff frequency signal. The mixer has a signal input coupled to the output of the tunable lowpass filter, a local oscillator input for receiving a local oscillator signal, and a signal output for providing a converted RF signal.

Integrated receiver and integrated circuit having integrated inductors and method therefor

Systems and methods are disclosed for MCM (multiple chip module) packages having multiple stacked demodulator dies that share one or more MCM pins. The shared pins can include clock generation pins, clock input/output pins, receive signal path input pins, voltage supply pins, ground supply pins, and/or any other desired pins. In addition to reducing footprint sizes for printed circuit board (PCB) applications, the multi-demodulator MCM package embodiments described herein also allow for improved routing of connection traces on PCBs.

Multi-chip modules having stacked television demodulators

An amplifier includes a negative gain amplifier, a load element, and a transconductance device. The negative gain amplifier has an input and an output. The load element has a first terminal coupled to a power supply voltage terminal, and a second terminal. The transconductance device has a first current electrode coupled to the second terminal of the load element, a control electrode coupled to the output of the negative gain amplifier, and a second current electrode coupled to the input of the negative gain amplifier.

Amplifier for television tuner chip and method therefor

An integrated circuit includes a tuner, a digital television (DTV) demodulator, an analog television (ATV) demodulator, and a controller. The tuner includes an input for receiving a radio frequency (RF) signal including at least one of an analog television signal and digital television signal, and including a first output terminal and a second output terminal. The DTV demodulator includes a DTV input coupled to the first output terminal of the tuner and includes a DTV output terminal. The ATV demodulator includes an ATV input coupled to the second output terminal of the tuner and includes an ATV output terminal. The controller is coupled to the tuner, the DTV demodulator, and the ATV demodulator to configure the tuner and at least one of the DTV demodulator and the ATV demodulator for receiving television content in a selected television format.

Receiver and method of receiving analog and digital television signals

An integrated receiver includes a first signal processing path, a second signal processing path, and a controller. The first signal processing path has an input and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor formed with windings in a first number of metal layers of the integrated receiver. The second signal processing path has an input and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor formed with windings in a second number of metal layers of the integrated receiver. The second number of windings is lower than the first number. The controller enables one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal.

A receiver circuit includes an analog front-end and a digital processing unit. The analog front-end includes an input for receiving a radio frequency (RF) signal, a first control input for receiving a gain adjustment signal, a second control input for receiving a timing signal, and a signal output for providing a digital intermediate frequency (IF) signal. The analog front-end updates gains of a plurality of gain stages according to the gain adjustment signal and in synchronism with the timing signal. The digital processing unit is configured to produce at least one output signal derived from the digital IF signal. The digital processing unit includes a timing recovery circuit configured to generate the timing signal based on the digital IF signal to control timing of the updating gains of each of the plurality of adjustable gain stages.

Mixed-mode receiver circuit including digital gain control

A frequency synthesizer includes a controlled oscillator configured to extend a temperature range and phase noise of the synthesizer without compromising the frequency coverage of the synthesizer. The frequency synthesizer also includes bias generation circuitry that sets a bias current of a charge pump to reduce bandwidth variations of the synthesizer. The frequency synthesizer further includes switching circuitry to dynamically turn a charge pump on and off to reduce effects of current leakage in the charge pump.

Frequency synthesizer

A receiver includes an input section, a plurality of RF sections, an output circuit, and a controller. The input section receives and amplifies a radio frequency (RF) input signal to provide an amplified RF signal, and has a gain input. The plurality of RF sections each have an input for receiving the amplified RF signal, and an output for providing an intermediate frequency signal. The output circuit provides an intermediate frequency output signal in response to an output of at least one of the plurality of RF sections. The controller has an output coupled to the gain input of the input section.

Integrated receivers and integrated circuit having integrated inductors

A low noise amplifier (LNA) for use in a receiver circuit includes an adjustable impedance network including an input for receiving a radio frequency signal, a plurality of control inputs, and an output. The LNA further includes a controller coupled to the plurality of control inputs and configured to control an impedance of the adjustable impedance network. The controller controls the adjustable impedance network to provide a relatively low impedance in a terrestrial mode and to provide a relatively high impedance in a cable mode.

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Austin, TX, United States of America

Ramin Khoini-Poorfard