Texas Instruments Corporation

Texas Instruments Japan Limited

Ramil Alfonso Viluan

Melvin B Alviar

Raymond Maldan Partosa

James R M Baello

Elaine B Reyes

Roxanna Bauzon Samson

Enrique R Ferrer

Mark Gerald Rosario Pinlac

Patricio Vergara Ancheta, Jr

Jeffrey De Guzman Esquejo

Ramices Julian Sanchez

Dolores Parobrob Babaran

Romulo D Casallo, Jr

Allan C Soriano

Jose Franco A Alicante

Patricio A Ancheta, Jr

Gang clips () having a flat area (), a ridge (), and tie bars () extending from the flat area, the end portions of the ties bars aligned in a common x-direction; a plurality of gang clips having respective end portions of tie bars merged in x-direction to form an elongated chain () of clips; and a plurality of chains arrayed parallel to each other, free of tie bars between adjacent chains, the plurality having the chain ends tied at both ends () to rails () normal to the chains to form a matrix () of clips having the rails as a stable frame.

Gang clips having distributed-function tie bars

A nonleaded IC package, such as a QFN, including an encapsulation block having at least one generally flat lateral sidewall surface; and a plurality of leads, each terminating in a generally chair-shaped flat surface that is flush with the generally flat lateral sidewall surface.

Nonleaded package and leadframe strip and method

A semiconductor device with a chip (), its position defining a plane, and an insulating substrate () with first and second surfaces; the substrate is substantially coplanar with the chip, without warpage. One of the chip sides is attached to the first substrate surface using adhesive material (), which has a thickness. The thickness of the adhesive material is distributed so that the thickness () under the central chip area is equal to or smaller than the material thickness () under the peripheral chip areas. Encapsulation compound () is embedding all remaining chip sides and the portions of the first substrate surface, which are not involved in the chip attachment. When reflow elements () are attached to the substrate contact pads, they are substantially coplanar with the chip.

Semiconductor assembly for improved device warpage and solder ball coplanarity

Disclosed herein is a warp detection system () for determining warping in a carrier () configured to carry substrates () for processing. In one embodiment, the system () includes a guide plate () configured to guide a path of the carrier () during the processing, where the guide plate () is positioned underneath the carrier (). In addition, the system () includes a plurality of sensors () positioned within the guide plate (), wherein each of the plurality of sensors () is configured to measure a distance of a respective area of the carrier () from the guide plate (). Also in this embodiment, the system () includes a processing device () configured to receive the measured distances and determine warping in the carrier () based on differences between the measured distances. Also disclosed are a method of determining warping in a carrier () configured to carry substrates () for processing, and a method of manufacturing a warp detection system () for determining warping in a carrier () configured to carry substrates () for processing.

System for detecting warped carriers and associated methods

A conveyor system ( ) comprises: a boat ( ), a feed belt ( ), a feed pulley ( ), and improved railings ( ). The boat ( ) is adapted to carry a component or components, such as semiconductor chips ( ), therein. The feed belt ( ) is driven by the feed pulley ( ). The feed belt ( ) is adapted to move the boat ( ) along the conveyor system ( ). The improved railings ( ) are adapted to retain the boat ( ) and to define a path for the boat ( ). A set of bearings ( ) are coupled to each of the improved railings ( ) in locations such that the boat ( ) will contact the bearings ( ) rather than the railings ( ) for at least part of the path as the boat ( ) moves along the conveyor system ( ).

Railing for a boat conveyor system

A work station for a chip bonder, and/or for a wire bonder includes a clampless, porous ceramic vacuum chuck where the substrate under assembly is securely and uniformly held by vacuum applied through many tiny pores distributed across the work surface. Porous ceramic work stations are applicable to a family of packages, or to a substrate outline, and may include one or more chips within the same indexing operation. Reliability and yield of the assembled semiconductor devices is enhanced by avoiding uneven or warped substrates. In addition, the porous ceramic work holder provides a cost effective apparatus by eliminating device specific clamps and work holders, the time required for change-out and set-up.

Porous ceramic work stations for wire and die bonders

Growing community of inventors

Baguio, Philippines

Ramil Alfonso Viluan