Infineon Technologies Ag

Indian Institute of Technology Bombay

Ramgopal Rao

Harald Gossner

Mayank Shrivastava

Maryam Shojaei Baghini

Cornelius Christian Russ

Ram Asra

Dinesh Kumar Sharma

Angada Sachid

Ashish Pal

Mahesh B Patil

Harshil Narendra Raval

Shree Prakash Tiwari

Ramesh Raju Navan

Anil Kumar

Mayank Shrivatsava

Prashanthi Kovur

Rajesh A Thakker

Tunnel field effect devices and methods of fabricating tunnel field effect devices are described. In one embodiment, the semiconductor device includes a first drain region of a first conductivity type disposed in a first region of a substrate, a first source region of a second conductivity type disposed in the substrate, the second conductivity type being opposite the first conductivity type, a first channel region electrically coupled between the first source region and the first drain region, the first source region underlying a least a portion of the first channel region, and a first gate stack overlying the first channel region.

Tunnel field effect transistors

In an embodiment of the invention, a semiconductor device includes a first region having a first doping type, a channel region having the first doping type disposed in the first region, and a retrograde well having a second doping type. The second doping type is opposite to the first doping type. The retrograde well has a shallower layer with a first peak doping and a deeper layer with a second peak doping higher than the first peak doping. The device further includes a drain region having the second doping type over the retrograde well. An extended drain region is disposed in the retrograde well, and couples the channel region with the drain region. An isolation region is disposed between a gate overlap region of the extended drain region and the drain region. A length of the drain region is greater than a depth of the isolation region.

Drain extended field effect transistors and methods of formation thereof

In one embodiment, the semiconductor device includes a first source of a first doping type disposed in a substrate. A first drain of the first doping type is disposed in the substrate. A first gate region is disposed between the first source and the first drain. A first channel region of a second doping type is disposed under the first gate region. The second doping type is opposite to the first doping type. A first extension region of the first doping type is disposed between the first gate and the first drain. The first extension region is part of a first fin disposed in or over the substrate. A first isolation region is disposed between the first extension region and the first drain. A first well region of the first doping type is disposed under the first isolation region. The first well region electrically couples the first extension region with the first drain.

High voltage semiconductor devices

Embodiments relate to a field-effect device that includes a body region, a first source/drain region of a first conductivity type, a second source/drain region, and a pocket implant region adjacent to the first source/drain region, the pocket implant region being of a second conductivity type, wherein the second conductivity type is different from the first conductivity type. The body region physically contacts the pocket implant region.

Field-effect device and manufacturing method thereof

In various embodiments, a method for manufacturing a semiconductor device is provided. The method for manufacturing a semiconductor device may include forming a first source/drain region, forming a second source/drain region, forming an active region electrically coupled between the first source/drain region and the second source/drain region, forming a trench disposed between the second source/drain region and at least a portion of the active region, forming a first isolation layer disposed over the bottom and the sidewalls of the trench, forming electrically conductive material disposed over the isolation layer in the trench, forming a second isolation layer disposed over the active region, and forming a gate region disposed over the second isolation layer. The electrically conductive material may be coupled to an electrical contact.

Methods for manufacturing a semiconductor device

The invention provides a photo-patternable multifunctional polymer nanocomposite. The nanocomposite comprises a solvent suspension of multiferroic nanostructures uniformly dispersed in SU-8 polymer matrix. The invention also provides a composite comprising a substrate and a photo-patterned multifunctional polymer nanocomposite layer formed on the substrate. The nanocomposite layer comprises a UV-photolithographed SU-8 polymer having a solvent suspension of multiferroic nanostructures uniformly dispersed in the polymer matrix.

Photo-patternable multifunctional polymer nanocomposite

In an embodiment, a semiconductor device is provided. The semiconductor device may include a substrate having a main processing surface, a first source/drain region comprising a first material of a first conductivity type, a second source/drain region comprising a second material of a second conductivity type, wherein the second conductivity type is different from the first conductivity type, a body region electrically coupled between the first source/drain region and the second source/drain region, wherein the body region extends deeper into the substrate than the first source/drain region in a first direction that is perpendicular to the main processing surface of the substrate, a gate dielectric disposed over the body region, and a gate region disposed over the gate dielectric, wherein the gate region overlaps with at least a part of the first source/drain region and with a part of the body region in the first direction.

Semiconductor devices

In various embodiments, a semiconductor device is provided. The semiconductor device may include a first source/drain region, a second source/drain region, an active region electrically coupled between the first source/drain region and the second source/drain region, a trench disposed between the second source/drain region and at least a portion of the active region, a first isolation layer disposed over the bottom and the sidewalls of the trench, electrically conductive material disposed over the isolation layer in the trench, a second isolation layer disposed over the active region, and a gate region disposed over the second isolation layer. The electrically conductive material may be coupled to an electrical contact.

Semiconductor devices and methods for manufacturing a semiconductor device

A method for determining ionizing radiation including applying a constant voltage across an organic semiconducting material sensor prior to and after exposure of the sensor to the ionizing radiation; measuring and converting the current passing through the sensor proportional to the conductivity or resistivity of the sensor which in turn is proportional to the ionizing radiation in the sensor, into a proportional analog voltage value; and comparing the value obtained prior to and after exposure of the sensor to the ionizing radiation and computing the ionizing radiation based on the change in the value. An electronic device for determining ionizing radiation including an organic semiconductor resistor, a constant voltage source, and to a current to voltage converter, an analog to digital converter, and a microprocessor.

Method and device for determining ionizing radiation

This disclosure relates to devices and methods relating to coupled first and second device portions.

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Mumbai, India

Ramgopal Rao