Texas Instruments Corporation

Ramesh Chandrasekaran

Haydar Bilhan

Weider Peter Chang

Karl H Renner

Feng Ying

Gonggui Xu

Jason Meiners

Lieyi Fang

Gary Lee

Cetin Kaya

Ching-Yuh Tsay

Erkan Bilhan

Fan Zhai

Steven Derrick Clynes

Yong Han

Xucheng Wang

An example circuit includes a first source follower input stage having a reference voltage input and a first output. A second source follower input stage has a feedback voltage input and a second output, in which second source follower input stage is configured to receive a feedback voltage at the feedback voltage input. The feedback voltage is representative of an output voltage at an output terminal of the circuit. A common gate differential gain stage has first and second differential inputs and first and second drive outputs. The first differential input is coupled to the first output, and the second differential input is coupled to the second output. The common gate differential gain stage is configured to control the output voltage at the output terminal by controlling at least one of the first or second drive outputs.

Fast startup power regulator circuitry

Pulse train conditioning circuits and related methods are disclosed. An example circuit includes a first transistor having a first current terminal and a first gate terminal, a second transistor having a second current terminal and a second gate terminal, a third transistor having a third current terminal and a third gate terminal, a fourth transistor having a fourth current terminal and a fourth gate terminal, the fourth gate terminal coupled to the first through third gate terminals, a first switch having first through third terminals, the first terminal coupled to the first current terminal, the second terminal coupled to the third current terminal, and the third terminal coupled to the fourth current terminal, and a second switch having fourth through sixth terminals, the fourth terminal coupled to the second current terminal, the fifth terminal coupled to the third current terminal, and the sixth terminal coupled to the fourth current terminal.

Pulse train conditioning circuits and related methods

Current sensing through a power semiconductor device with reduced sensitivity to temperature and process variations. An example arrangement includes a power switch coupled between a voltage input and an output voltage terminal supplying current to a load; a first isolation switch coupled between the voltage input and a first node; a comparator amplifier having a pair of differential inputs coupled to the first node and a second node outputting a voltage in response to the difference at the differential inputs; and a first current source coupled between a positive supply voltage and the first node to output a first current responsive to the voltage output from the comparator amplifier; wherein the first current is proportional to the current through the power switch and a ratio of the on resistance of the power switch and the on resistance of the first isolation switch. Methods and additional arrangements are also disclosed.

Methods and apparatus for sensing current through power semiconductor devices with reduced sensitivity to temperature and process variations

A method for motion detection is provided that includes determining a first motion measure for a pixel based on differences between first neighboring pixels of the pixel, determining a detail measure for the pixel, wherein the detail measure is indicative of an amount of detail in second neighboring pixels of the pixel, adapting a first coring threshold and a first gain of a first transfer function based on the detail measure, and using the adapted first transfer function to map the first motion measure to a first motion parameter.

Motion detection in video with large areas of detail

Systems and methods are provided for detecting motion within a composite video signal. A first chroma difference element compares an in-phase chroma component of the composite video signal to a delayed representation of the in-phase chroma component to produce a first chroma difference value for a given pixel. A second chroma difference element compares a quadrature chroma component of the composite video signal to a delayed representation of the quadrature chroma component to produce a second chroma difference value for the pixel. A parameter mapping component maps the first and second difference values to respective first and second motion parameters that indicates the degree of change in the chroma properties of the pixel. A parameter selector determines a composite motion parameter for the pixel from the first and second motion parameters.

Motion detector for a video display system

A method for treating inter-frame motion in a series of consecutive signal frames of a composite video signal includes the steps of, for an evaluation pixel position in each frame of a test frame-set including three successive signal frames: (a) determining whether there is at least a predetermined difference in chroma component or in luma component signals at the evaluation pixel; (b) if in step (a) there is not a predetermined difference in chroma component signals or in luma component signals, determining whether a first and third frame of the test frame-set are substantially identical; (c) determining whether at least a first predetermined number of the luma or chroma component signals in the test frame-set present at least one false color; and (d) determining whether at least a second predetermined number of high frequency luma component signals exist in the test frame-set.

Method for treating inter-frame motion in a composite video signal

Systems and method are provided for luma-chroma separation. A demodulator system demodulates a composite video signal to produce at least two baseband chroma signals. A given baseband chroma signal contains chroma information for one of a plurality of video frames comprising the composite signal. A three-dimensional (3-D) comb filter removes luma information from a given baseband chroma signal by combining sets of at least two baseband chroma signals to form a 3-D filtered baseband signal.

Systems and methods for separating luma and chroma information in a composite video signal

Systems and methods are provided for correcting color phase error in a video decoder system. A demodulator system demodulates the composite input signal and the at least one delayed signal to produce sets of baseband chroma components based on a phase correction value. Color phase correction logic determines the phase correction value for the demodulator system based upon characteristics of the baseband chroma components associated with a series of at least two consecutive frames.

Systems and methods for correcting color phase error in video systems

A clamping circuit disclosed herein has two modes of operation which include both a bottom level and mid-level clamping mode for clamping automatically onto the sync tip of a video signal and customizably clamping onto the front porch, back porch/pedestal or anywhere within the signal. The clamping circuit () includes a clamping capacitor () that couples to an automatic clamping circuit portion () to automatically clamp the synchronization pulse of the video input signal to a first predetermined reference voltage (V) of a first clamping pulse signal during an automatic clamping mode of operation. The automatic clamping portion () connects to the customizable clamping circuit portion () to clamp any portion of the video input signal to a second predetermined reference voltage (V) of a second clamping pulse signal during a customizable clamping mode of operation. A buffer () connects between the customizable clamping circuit portion and the output node of the clamping circuit.

Clamping circuit with wide input dynamic range for video or other AC coupled signals

A switch capacitor amplifier using a 'bottom plate sampling' type arrangement in the feedback network to mitigate the reduction in linearity due to feedback switch charge injection. The switch (A) connecting the feedback capacitor (Cf) to the opamp () input is opened prior to the switch (A) connecting the feedback capacitor (Cf) to the output such that the charge injected into the opamp input nodes come from the switch connected to the opamp input, and is independent of the signal value to the first order as the switches are at the opamp input common mode voltage.

Switching scheme to improve linearity and noise in switched capacitor stage with switched feedback capacitor

An image processing apparatus () for a charge coupled device including analog front end circuitry having optical black and offset correction, whereby the offset and optical black correction circuit is programmable. The present invention includes a first circuit () to sample the incoming optical black signal output from a CCD. This first circuit includes a correlated double sampler () coupled to a first programmable gain amplifier (). An adder () connects between the first programmable gain amplifier () and a second gain amplifier () for adding in the optical black offset to the optical black signal input from the CCD. A second circuit () includes a reverse programmable gain amplifier () connected to the output of the second programmable gain amplifier () to amplify the optical black level inversely proportional to the gain from the second programmable gain amplifier (). The second circuit () also includes an integrator () coupled to the reverse programmable gain amplifier () to integrate the difference between the incoming signal and the desired optical black value. The second circuit () couples to the adder () to add the positive and negative difference to the optical black signal. An analog-to-digital converter () converts the sampled signal for further processing at the output of the image processing apparatus ().

Analog optical black clamping circuit for a charge coupled device having wide programmable gain range

An image processing apparatus ( ) for a charge coupled device having hot/cold pixel and line noise filtering is disclosed which provides optical black and offset correction. The present invention teaches an offset and optical black correction circuit having a digital filter to obtain noise-free optical black correction for charge-coupled devices such that a digitally programmable bandwidth exists. The sum of the channel offset and optical black level is averaged for a given number of lines having a number of optical black cells per line and this sum passes through a digital filter. Moreover, the channel is digitally calibrated to obtain a user programmed ADC ( ) output which corresponds to that average.

Digital scheme for noise filtering of optical black and offset correction in CCD signal processing

An image processing apparatus for a charge coupled device including analog front end circuitry having optical black and offset correction, whereby the an offset and optical black correction circuit has a digitally programmable bandwidth is disclosed herein. The image processing apparatus includes a sampling circuit to sample the incoming optical black signal output from a CCD. The sampled signal is filtered through an analog-to-digital converter for processing by a digital detector circuit which detects the average optical black level of the sampled signal. The sum of the channel offset and optical black level present at the output of the digital detector circuit as a digital error signal is averaged for a given number of lines and optical black cells per line by a digital averager included within the digital detector circuit. Moreover, calibration logic digitally calibrates the channel to obtain a user programmed ADC output which corresponds to that average. Furthermore, the correction circuit includes a digital-to-analog converter that converts the difference into an analog signal to be applied as an adjustment to the analog image signal at the input of the image processing apparatus. Thus, the error signal is fed back to the analog channel through the DAC in order to modify the existing signal such that a desired optical black level at the output of the ADC exists.

Optical black and offset correction in CCD signal processing

An image processing apparatus for charge coupled device (CCD) and video inputs in a digital camera or for a digital camcorder is disclosed which provides optical black and offset correction for CCD inputs. A sampling circuit, including correlated double sampler (CDS) ( ) and programmable gain amplifier ( ), samples the image input signal and the video input signal. CDS ( ) includes a single-ended amplifier ( ) and a differential amplifier ( ). The single-ended amplifier ( ) functions such that it is only operable during an CCD signal input; otherwise, the single-ended amplifier ( ) is bypassed such that a video signal is only sampled by the differential amplifier ( ). For CCD signals, the single-ended amplifier ( ) samples the reference level of the pixel and holds it during the video interval. The differential amplifier ( ) samples both the output of the single ended amplifier ( ) and the video level of the same pixel. Overall, the CDS ( ) subtracts these levels and converts the difference to a differential output to improve signal to noise performance and dynamic range. An analog-to-digital converter ( ) converts the sampled signal and feeds this digital sample to a digital correction circuit ( ) where optical black level, hot and cold pixels, and line noise are removed.

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Plano, TX, United States of America

Ramesh Chandrasekaran