Intel Corporation

Ramamohan Rao Vakkalagadda

Derrick Chu Lin

Michael N Derr

Venu Madhav Kuchibhotla

Nimish H Modi

Varsha P Tagare

Satchitanand Jain

An apparatus includes at least two circuits having interfaces, for transmitting and receiving bus formatted messages and a port coupled to receive messages from the interfaces. The port broadcasts a first received message that is not destined for one of the circuits to the bus. The port blocks broadcast of a second received message that is destined for one of the circuits to the bus.

Bus communication

A technique for increasing the number of physical segment registers by renaming logical segment registers into a larger register space. The remapping of the segment registers allows for instructions accessing the segment registers to be executed non-serially. The renaming of segment registers is achieved by assigning a shadow register to a segment register name. Thus, a pair of registers are physically available for a specified logical register in an instruction set to be renamed. Two bits, designated as the PSEG and SPEC bits, are used to control the remapping.

System for allowing multiple instructions to use the same logical

Growing community of inventors

San Jose, CA, United States of America

Ramamohan Rao Vakkalagadda