General Electric Company

Ramakrishna Rao

Stephen Daley Arthur

Peter Almern Losee

Kevin Sean Matocha

Ertugrul Berkcan

Emad Andarawis Andarawis

Daniel White Sexton

Alexander Viktorovich Bolotnikov

Austars Raymond Schnore, Jr

Marc Robert Pearlman

Samantha Rao

Eugene Joseph Orlowski, Jr

Somashekhar Basavaraj

Kevin Dean Matocha

Rahul Gore

William James Premerlani

Scott Charles Evans

Ahmed Elasser

Susanne Madeline Lee

Thomas F Papallo

Changting Wang

Chayan Mitra

Zachary Matthew Stum

Vamshi Krishna Reddy Kommareddy

Paul Burchell Glaser

Charles Scott Sealing

Terry Michael Topka

Manoharan Venugopal

Jeffrey Bernard Fedison

Shobhana Mani

Mingxiao Jiang

Saratchandra Shanmukh

Paul Joseph Martin

Daniel Lawrence Morrill

Indra Purkayastha

An insulated gate field-effect transistor (IGFET) device includes a semiconductor body () and a gate oxide (). The semiconductor body includes a first well region () doped with a first type of dopant and a second well region () that is doped with an opposite, second type of dopant and is located within the first well region. The gate oxide includes a relatively thinner outer section () and a relatively thicker interior section (). The outer section is disposed over the first well region and the second well region. The interior section is disposed over a junction gate field effect transistor region () of the semiconductor body doped with the second type of dopant. A conductive channel is formed through the second well region when a gate signal is applied to a gate contact () disposed on the gate oxide.

Transistor and switching system comprising silicon carbide and oxides of varying thicknesses, and method for providing the same

An insulating gate field effect transistor (IGFET) device includes a semiconductor body and a gate oxide. The semiconductor body includes a first well region doped with a first type of dopant and a second well region that is doped with an oppositely charged second type of dopant and is located within the first well region. The gate oxide includes an outer section and an interior section having different thickness dimensions. The outer section is disposed over the first well region and the second well region of the semiconductor body. The interior section is disposed over a junction gate field effect transistor region of the semiconductor body. The semiconductor body is configured to form a conductive channel through the second well region and the junction gate field effect transistor region when a gate signal is applied to a gate contact disposed on the gate oxide.

Insulating gate field effect transistor device and method for providing the same

A semiconductor device includes a substrate comprising a semiconductor material. The substrate has a surface that defines a surface normal direction and includes a P-N junction comprising an interface between a first region and a second region, where the first (second) region includes a first (second) dopant type, so as to have a first (second) conductivity type. The substrate includes a termination extension region disposed adjacent to the P-N junction and having an effective concentration of the second dopant type that is generally the effective concentration of the second dopant type in the second doped region. The substrate includes an adjust region disposed adjacent to the surface and between the surface and at least part of the termination extension region, where the effective concentration of the second dopant type generally decreases when moving from the termination extension region into the adjust region along the surface normal direction.

Semiconductor device

A substrate having semiconductor material and a surface that supports a gate electrode and defines a surface normal direction is provided. The substrate can include a drift region including a first dopant type. A well region can be disposed adjacent to the drift region and proximal to the surface, and can include a second dopant type. A termination extension region can be disposed adjacent to the well region and extend away from the gate electrode, and can have an effective concentration of second dopant type that is generally less than that in the well region. An adjust region can be disposed between the surface and at least part of the termination extension region. An effective concentration of second dopant type may generally decrease when moving from the termination extension region into the adjust region along the surface normal direction.

Semiconductor device and method of making the same

A system to detect a plurality of elements is proposed. The system includes one or more X-ray sources for transmitting X-rays towards a sample and also includes plurality of photon detectors. An array of crystals are arranged in a curvature with appropriate geometry for receiving a plurality of photon energies emitted from the sample and focusing the photon energy on the plurality of detectors. The plurality of photon detectors are spatially arranged at Bragg angles corresponding to signature photon energies to detect the plurality of elements simultaneously.

Elemental composition detection system and method

A MOSFET device and a method for fabricating MOSFET devices are disclosed. The method includes providing a semiconductor device structure including a semiconductor device layer of a first conductivity type, and ion implanting a well structure of a second conductivity type in the semiconductor device layer, where the ion implanting includes providing a dopant concentration profile in a single mask implant sequence.

MOSFET devices and methods of making

A transistor switch for a system operating at high frequencies is provided. The transistor switch comprises a graded channel region between a source region and a drain region, the graded channel region configured for providing a low resistance to mobile negative charge carriers moving from the source region to the drain region, wherein the graded channel comprises at least two doping levels.

Static induction transistor

A protection system for a power distribution system is provided. The protection system includes a central computer, a plurality of data modules, and a data network. The data modules are each in communication with a different circuit breaker of the power distribution system. The data network communicates between the central computer and the plurality of data modules. The central computer sends an instruction to the plurality of data modules over the data network to aid in synchronization of sampling of a power condition at the plurality of data modules.

Protection system for power distribution systems

A method and apparatus for operating a power distribution system circuit breaker is provided. The circuit breaker includes an associated node electronics unit wherein a node electronics unit redundancy requirement is predetermined. The method includes monitoring electrical system parameters associated with the circuit breaker with the node electronics unit, communicating the electrical system parameters over a digital network to at least one central control processing unit, receiving commands and actions from the at least one central control processing unit over the digital network, determining circuit breaker actuation commands based at least partially on the received commands and actions, and operating the circuit breaker based on the circuit breaker actuation commands.

Method and apparatus for node electronics unit architecture

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Bengaluru, India

Ramakrishna Rao