Texas Instruments Corporation

Maxim Integrated Products, Inc.

Ramakrishna Ankamreddi

Rohit Phogat

Saurabh Rai

Venkateswarlu Ramaswamy Tiruvamattur

Isha Agrawal

Siddhant Rohela

Ranjit Kumar Dash

Naresh Venkata Kotikelapudi

Ramesh Giri

An error amplifier includes a first transistor having a first error amplifier input and having first and second current terminals, a second transistor having a second error amplifier input and having third and fourth current terminals, a first resistor coupled between a supply voltage terminal and the first current terminal, and a second resistor coupled between the supply voltage terminal and the third current terminal. The error amplifier has a second stage circuit coupled to the first and second resistors. The second stage circuit has an error amplifier output. The second stage circuit is configured to cause less current to flow through the second stage circuit than a current that flows through either of the first or second resistors or the first or second transistors.

Amplifier having transconductance attenuation

Described embodiments include a circuit for dampening overshoot in a voltage regulator. The circuit includes a first and second offset voltage circuits, each having an input coupled to an input voltage terminal. A first comparator has a first comparator input coupled to the first offset output, and a second comparator input coupled to a reference voltage terminal. A second comparator has a third comparator input coupled to an output of the second offset circuit, and a fourth comparator input coupled to a voltage regulator output. An OR gate has first and second logic inputs and a logic output. The first and second logic inputs are coupled to the outputs of the first and second comparators, respectively. A turn-off circuit has a turn-off input coupled to the logic output, and is configured to provide a turn-off signal at a turn-off output to stop current flow from the voltage regulator output.

Voltage overshoot dampener in dropout condition

Techniques for controlling a low-dropout (LDO) voltage regulator. In an example, an LDO voltage regulator circuit includes an amplifier having an output coupled to a transistor. First and second inputs of the amplifier are coupled to a power supply node via first and second resistors, respectively. The transistor gate is coupled to the amplifier output, the transistor source is coupled to the second input of the amplifier, and the transistor drain is coupled to a reference voltage node. The second resistor is variable based on the amplifier output and a reference voltage from the reference voltage node. In an example, the reference voltage node is connectable to ground via a reference resistor connected in parallel with a noise-filtering capacitor, which causes a reference current to flow through the transistor. The reference current is adjusted based on the drain-to-source voltage of the transistor.

Fast soft-start reference current controlled by supply ramp

Described embodiments include a circuit for reducing output voltage noise in a voltage regulator includes an amplifier having first and second amplifier inputs, a compensation terminal and an amplifier output. The first amplifier input is coupled to a reference voltage terminal, and the compensation terminal coupled to an output terminal. A buffer amplifier has a buffer input and a buffer output, and the buffer input is coupled to the amplifier output. A first transistor is coupled between a supply voltage terminal and the output terminal, and has a first control terminal that is coupled to the buffer output. A boost current injection circuit has a boost input and a boost output, and the boost input is coupled to the supply voltage terminal. A second transistor is coupled between the boost output and the compensation terminal, and has a second control terminal.

Improving power supply rejection ratio across load and supply variances

A voltage supervisor includes a first transistor coupled between a first supply voltage and a second supply voltage. The voltage supervisor includes a second transistor coupled between the first supply voltage and the second supply voltage. The voltage supervisor is configured to provide a first current proportional to a difference in gate-to-source voltages of the first transistor and the second transistor. The voltage supervisor is also configured to provide a second current proportional to a difference in the first supply voltage and the difference in gate-to-source voltages of the first transistor and the second transistor. The voltage supervisor is configured to compare the first current to the second current to determine a voltage value that changes a state responsive to the first supply voltage crossing a threshold.

Voltage supervisor with low quiescent current

Described embodiments include a voltage regulator circuit comprising an output voltage terminal configured to be coupled to a load that draws a load current, first and second amplifiers, and first, second, third, fourth and fifth transistors. The embodiment also includes a dynamic R-C network coupled between the third amplifier input and the seventh transistor current terminal, wherein the dynamic R-C network includes capacitors and MOS-based resistors, a third amplifier having a fourth amplifier input and a third amplifier output, wherein the fourth amplifier input is coupled to the output voltage terminal, and a capacitor that is coupled between the output voltage terminal and the fourth amplifier input.

Circuit and method for mitigating transient effects in a voltage regulator

Mitigation of transient effects for wide load ranges

A circuit includes a reference voltage generator circuit and a regulation loop circuit having an output voltage terminal. The regulator circuit further includes a fault detection circuit having a first input terminal coupled to the output voltage regulator terminal of the regulation loop circuit. The fault detection circuit asserts, on an output terminal of the fault detection circuit, a fault flag signal responsive to a voltage on the first input terminal falling below a first threshold. A programmable filter is coupled between the reference voltage generator circuit and the regulation loop circuit and is coupled to the fault detection circuit. The programmable filter has a programmable time constant. The programmable filter responds to an assertion of the fault flag signal by decreasing the time constant.

Recovery mechanism during an input or output voltage fault condition for a voltage regulator

A circuit includes first and second transistors, an adaptive bias current source circuit, and an adaptive resistance circuit. The first transistor has a control terminal and first and second current terminals. The control terminal of the first transistor being a first input to the circuit. The second transistor has a control terminal and first and second current terminals, and the control terminal of the second transistor is a second input to the circuit. The first and second inputs are differential inputs to the circuit. The adaptive bias current source circuit is coupled to the second current terminal of the first transistor. The adaptive resistance circuit is coupled between the second current terminal of the second transistor and the adaptive bias current source circuit.

Adaptive bias control for a voltage regulator

A circuit includes a first power transistor including a first control input and first and second current terminals. The circuit includes a second power transistor including a second control input and third and fourth current terminals. Third current terminal couples to the first current terminal, and the fourth current terminal couples to the second current terminal at an output node. An error amplifier generates an error signal based on a difference between a reference voltage and an output voltage on the output node. An adaptive buffer couples to an output of the error amplifier and couples to the first and second control inputs. The adaptive buffer causes the first power transistor to be on through a range of output current and to cause the second power transistor to be on through some, but not all, of the range of output current.

Adaptive gate buffer for a power stage

A current sensing circuit includes a pass transistor, a first sense transistor, a second sense transistor, a driver circuit, and sense circuitry. The driver circuit coupled to, and configured to generate a drive signal to control, the pass transistor, the first sense transistor, and the second sense transistor. The sense circuitry coupled to the pass transistor, the first sense transistor, and the second sense transistor. The sense circuitry includes a first sense circuit and a second sense circuit. The first sense circuit is configured to generate an output current proportional to a current flowing in the pass transistor. The second sense circuit is coupled to the driver circuit and is configured to set the drive signal to a predetermined voltage responsive to a voltage across the pass transistor being less than a threshold voltage.

Load current sense circuit

A voltage regulator circuit comprises: a pass transistor comprising a gate, a source, and a drain; an error amplifier comprising an output port coupled to the gate of the pass transistor, a first input port, and a second input port; a feedback circuit coupled to the drain of the pass transistor, and coupled to the first input port of the error amplifier to provide a feedback voltage at the first input port of the error amplifier; a sink transistor comprising a gate, a source, and a drain coupled to the drain of the pass transistor; a sink gate voltage circuit coupled to the gate of the sink transistor to provide a gate voltage at the gate of the sink transistor; and a pass gate sensing circuit coupled to the output port of the error amplifier to provide current to the sink gate voltage circuit.

Voltage regulator circuits with pass transistors and sink transistors

A system comprises a pulse width modulator, a voltage sensing circuit, a pulse generator, and a sampling circuit. The pulse width modulator generates a control signal to control a switch connected to an input voltage via a primary winding and to regulate an output voltage across a secondary winding that is supplied to a load through a component connected in series with the secondary winding. The voltage sensing circuit senses a first voltage across the primary winding that represents the output voltage. The pulse generator generates a single pulse at a sampling time during a first cycle of the control signal, which is determined based on the input voltage, a voltage drop across the switch, an on-time of the switch, and the first voltage sensed during the first cycle. The sampling circuit samples the first voltage based on the single pulse at the sampling time during the first cycle.

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Bengaluru, India

Ramakrishna Ankamreddi