Psiquantum Corp.

Amkor Technology Singapore Holding Pte. Ltd.

Globalfoundries Inc.

Ramakanth Alapati

Gabriel J Mendoza

Albert Wang

John Eugene Berg

Matteo Staffaroni

Hyun Cho

Ki Yeul Yang

Kyung Han Ryu

Seok Hun Yun

Darrell Paul Baker

Anthony B Taguinod

Shaun Bowers

Bora Baloglu

Bradley Snyder

Soumyadipta Basu

Luke G England

Chun Yu Wong

Saket Chadda

Teck Jung Tang

Rahul Agarwal

Himani Suhag Kamineni

Adam Beece

Maria Balicka

Jon Greenwood

A device includes a die stack including a first die including a quantum circuit and a second die including an electronic circuit. The second die and the first die face each other. A coupler is bonded to a first surface of the first die, an optical fiber is coupled to the coupler for coupling light from the optical fiber to the quantum circuit.

Photonic quantum computer assembly with a quantum computing die facing an electronic circuit die

In one example, an electronic device includes a semiconductor sensor device having a cavity extending partially inward from one surface to provide a diaphragm adjacent an opposite surface. A barrier is disposed adjacent to the one surface and extends across the cavity, the barrier has membrane with a barrier body and first barrier strands bounded by the barrier body to define first through-holes. The electronic device further comprises one or more of a protrusion pattern disposed adjacent to the barrier structure, which can include a plurality of protrusion portions separated by a plurality of recess portions; one or more conformal membrane layers disposed over the first barrier strands; or second barrier strands disposed on and at least partially overlapping the first barrier strands. The second barrier strands define second through-holes laterally offset from the first through-holes. Other examples and related methods are also disclosed herein.

Semiconductor device and method of manufacturing semiconductor device

An assembly system for assembling an optical die to an optical substrate includes test equipment configured to test optical couplers formed between the optical die and the optical substrate. The assembly system is configured to adjust an alignment of the optical die relative to the optical substrate until the optical couplers meet a performance metric. After the performance metric is met the optical die is permanently attached to the optical substrate.

Active alignment of optical die to optical substrates

Techniques disclosed herein relate generally to integrating photonic integrated circuits and electronic integrated circuits in a same package. A device includes a semiconductor substrate and a die stack on the semiconductor substrate. The die stack includes a photonic integrated circuit (PIC) die and an electronic integrated circuit (EIC) die. The PIC die includes a PIC substrate and a photonic integrated circuit formed on the PIC substrate. The EIC die includes an EIC substrate and an electronic integrated circuit formed on the EIC substrate. The EIC die and the PIC die are bonded such that the PIC substrate and the EIC substrate are disposed on opposing sides of the die stack. The PIC substrate is bonded to the semiconductor substrate. The device also includes a cooling plate bonded to the EIC substrate.

Hybrid system including photonic and electronic integrated circuits and cooling plate

A device includes a die stack including a first die including a quantum circuit and a second die including an electronic circuit. The second die and the first die face each other. The device also includes a first interconnect between the quantum circuit and the electronic circuit and a second interconnect between the quantum circuit and the electronic circuit.

Photonic quantum computer assembly

A packaged electronic device structure includes a substrate having a major surface. A semiconductor device is connected to the major surface of the substrate, the semiconductor device having a first major surface, a second major surface opposite to the first major surface, and a side surface extending between the first major surface and the second major surface. A package body encapsulates a portion of the semiconductor device, wherein the side surface of the semiconductor device is exposed through a side surface of the package body. In some examples, the side surface of the semiconductor device is an active surface. In some examples, the package body comprises a molded structure that contacts and overlaps the first major surface of the semiconductor device.

Semiconductor device and method of manufacturing a semiconductor device

A packaged semiconductor device includes a substrate with first and second opposing major surfaces. A stacked semiconductor device structure is connected to the first major surface and includes a plurality of semiconductor die having terminals. Conductive interconnect structures electrically connect the terminals of the semiconductor dies together. The semiconductor dies are stacked together so that the terminals are exposed, and the stacked semiconductor device structure comprises a stepped profile. The conductive interconnect structures comprise a conformal layer that substantially follows the stepped profile.

Semiconductor devices and methods of manufacturing semiconductor devices

A method for forming a packaged electronic device includes providing a substrate having a first major surface and an opposing second major surface. The method includes attaching an electronic device to the first major surface of the substrate and providing a first conductive structure coupled to at least a first portion of the substrate. The method includes forming a dielectric layer overlying at least part of the first conductive structure. The method includes forming a conductive layer overlying the dielectric layer and connected to a second portion of the substrate. The first conductive structure, the dielectric layer, and conductive layer are configured as a capacitor structure and further configured as one or more of an enclosure structure or a stiffener structure for the packaged electronic device.

Semiconductor device having a lid configured as an enclosure and a capacitive structure and method of manufacturing a semiconductor device

Techniques disclosed herein relate to devices that each include one or more photonic integrated circuits and/or one or more electronic integrated circuits. In one embodiment, a device includes a silicon substrate, a die stack bonded (e.g., fusion-bonded) on the silicon substrate, and a printed circuit board (PCB) bonded on the silicon substrate, where the PCB is electrically coupled to the die stack. The die stack includes a photonic integrated circuit (PIC) that includes a photonic integrated circuit, and an electronic integrated circuit (EIC) die that includes an electronic integrated circuit, where the EIC die and the PIC die are bonded face-to-face (e.g., by fusion bonding or hybrid bonding) such that the photonic integrated circuit and the electronic integrated circuit face each other. In some embodiments, the device also includes a plurality of optical fibers coupled to the photonic integrated circuit.

Quantum computing die assembly with thru-silicon vias

Photonic quantum computer assembly having dies with specific contact configuration and matched CTE

Quantum computing die assembly with thru-silicon vias and connected logic circuit

Growing community of inventors

Dublin, CA, United States of America

Ramakanth Alapati