Microsubstrates Corporation

Sigmatron Nova, Inc.

Monosolar Inc.

Ramachandra M Panicker

Robert L Rod

Mark B Knaster

Walter F Essinger

Anil K Agarwal

Ferdinand A Kroger

A fine-pitch pin grid array for mounting an IC chip having a number of signal, ground and power contact pads thereon comprises a square as-fired ceramic substrate having a corresponding number of signal, ground and power metal filled vias located on the side portions of the surface thereof. Deposited on the surface of the substrate is a thin-film metallization which includes a corresponding number of signal, ground and power bonding pads located on the sides of the central portion thereof and further includes conductive traces which provide for connecting each signal metal filled via to a signal bonding pad. Deposited over the thin-film metallization is a multilayer circuit which includes a first dielectric layer having a low dielectric constant, a ground metal layer, a second dielectric layer having a high dielectric constant, and a power metal layer. The ground metal layer is used to commonly connect the ground metal filled vias to the ground bonding pads. The power metal layer is used to commonly connect the power metal filled vias to the power bonding pads. The ground and power layers and the intervening second dielectric layer further function as an integrated decoupling capacitor. Moreover, the ground layer further functions to control the impedance of the signal conductive traces.

Fine-pitch chip carrier

An as-fired alumina substrate for a hybrid microcircuit formed of GaAs dies operating at gigahertz frequencies has a large number of about 0.013' diameter via holes drilled on the surface thereof by use of a laser. A metal filling in each via hole is formed with about 85% sintered tungsten and 15% copper reflowed into the pores thereof to provide a composition that has a thermal coefficient of expansion that substantially matches that of the GaAs dies and the alumina substrate and also provides for hermetically sealing the via holes. The alumina substrate is further provided with a ground plane by which it is mounted on a metal block serving as a heat sink. The high frequency GaAs dies mounted on the via holes use the metal fillings therein to carry their internally generated heat to the heat sink and to provide low inductance ground paths for the microcircuit. A process for placing the metal filling in the via holes makes use of a stencil having the same large number of via holes thereon as the alumina substrate for first squeegeeing a tungsten paste with a predetermined amount of binder into the via holes of the substrate. After the tungsten is sintered, the stencil is then used to squeegee a copper paste on the top of the sintered tungsten in the via holes. The copper in the paste is then reflowed into the pores of the sintered tungsten.

Ceramic substrate with metal filled via holes for hybrid microcircuits

A thin-film electroluminescent panel which has a light sink layer deposited immediately behind the phosphor layer thereof is modified to have a light emission enhancing dielectric layer deposited between the phosphor layer and the light sink layer. The light emission enhancing dielectricphosphor interface provides for injecting hot electrons for impact-exciting the luminescent centers in the phosphor to enable the panel to generate light when the front electrode of the panel is positive in potential. Moreover, the light emission enhancing dielectric layer is formed of a material having the same index of refraction as the phosphor layer so that it will pass the incident ambient light and the rearwardly directed light generated in the phosphor layer without reflection into the light sink layer wherein it is trapped by internal reflection and absorbed.

Light emission enhancing dielectric layer for EL panel

A thin-film electroluminescent (EL) panel operating as a matrix-addressed display is provided with a light sink layer immediately behind the phosphor layer thereof to enhance the legibility of the display under high ambient light conditions. The light sink layer is formed of a p-type semiconductor compound material comprised of 20% lead telluride and 80% cadmium telluride doped with indium. The addition of the indium into the material introduces free electrons which compensate for the hole carriers therein and thereby increases the specific resistivity of the material. The addition of lead into the semiconductor compound material forms the lead telluride which in combination with the cadmium telluride reduces the energy band gap of the material to effectively absorb the ambient light in the visible range which is the source of the bad legibility. Moreover, the lead serves to reduce the mobility of the free charge carriers in the material and thereby further increases the specific resistivity of the material. Thus, the combined effects of the indium and the lead provide the semiconductor compound material with a specific resistivity in the range of 10.sup.8 to 10.sup.12 ohm-centimeter. Such a high specific resistivity material for the light sink layer is especially useful in enabling the EL panel to operate with a relatively steep luminance vs. voltage characteristic curve as required for multiplexing operation of the matrix-addressed EL panel.

Light sink layer for a thin-film EL display panel

A photo-voltaic power cell based on a photoelectric semiconductor compound and the method of using and making the same. The semiconductor compound in the photo-voltaic power cell of the present invention can be electrolytically formed at a cathode in an electrolytic solution by causing discharge or decomposition of ions or molecules of a non-metallic component with deposition of the non-metallic component on the cathode and simultaneously providing ions of a metal component which discharge and combine with the non-metallic component at the cathode thereby forming the semiconductor compound film material thereon. By stoichiometrically adjusting the amounts of the components, or otherwise by introducing dopants into the desired amounts, an N-type layer can be formed and thereafter a P-type layer can be formed with a junction therebetween. The invention is effective in producing homojunction semiconductor materials and heterojunction semiconductor materials. The present invention also provides a method of using three electrodes in order to form the semiconductor compound material on one of these electrodes. Various examples are given for manufacturing different photo-voltaic cells in accordance with the present invention.

Growing community of inventors

Camarillo, CA, United States of America

Ramachandra M Panicker