Cray Research, Inc.

Ram K Gupta

Alan J Schiffleger

Christopher C Hsiung

Melvin C August

Eugene N Reshanov

Stephen A Bowen

Stephen Cermak, Iii

John T Williams

George W Leedom

Max C Logan

M Dean Roush

Lester T Davis

Lars Herlufsen

Louis Saye

Vector shifting elements of a vector register by varying amounts in a single process is achieved in a vector supercomputer processor. A first vector register contains a set of operands, and a second vector register contains a set of shift counts, one shift count for each operand. Operands and shift counts are successively transferred to a vector shift functional unit, which shifts the operand by an amount equal to the value of the shift count. The shifted operands are stored in a third vector register. The vector shift functional unit also achieves word shifting of a predetermined number of vector register elements to different word locations of another vector register.

Vector shift functional unit for successively shifting operands stored

Vector word shift by vo shift count in vector supercomputer processor

The present invention provides a memory interface system wherein there is provided a memory having multiple ports and divided into sections, with each section divided into subsections, with memory banks within each subsection, and the banks divided into at least two bank groups. The invention further provided a memory interface for controlling the referencing of said memory banks according to which bank group they are in.

Method and apparatus for sharing memory in a multiprocessor system

Computer cabinet

Growing community of inventors

Eau Claire, WI, United States of America

Ram K Gupta