Dell Products Inc.

Ralph H Johnson

Shiguo Luo

Kejiu Zhang

John Erven Jenne

Hang Li

Timothy Michael Lambert

Stuart Allen Berke

Lei Wang

Mehran Mirjafari

James Lewis Petivan

Shawn Joel Dube

John J Breen

Jordan Chin

Guangyong Zhu

Douglas Evan Messick

George Gilman Richards, Iii

Craig Anthony Klein

Abey K Mathew

Bruce Wagner

A voltage regulator system of an information handling system includes a voltage regulator and a voltage regulator controller. The voltage regulator includes multiple power-stages (Pstages). The voltage regulator controller communicates with the voltage regulator. The voltage regulator controller monitors for a first fault signal on a first pin of a circuit associated with a first Pstage of the Pstages. In response to a first voltage of the first fault signal at the first pin being greater than a threshold voltage, the voltage regulator controller monitors a second pin of the circuit for a second fault signal and determines whether a voltage of the second fault signal at the second pin is equal to a second voltage. Based on the voltage of the second fault signal being equal to the second voltage, the voltage regulator controller determines a first fault has occurred in the first Pstage.

Fault identification of multiple phase voltage regulator

An information handling system includes a management controller that may determine average power consumption of a processor, and determine average power measurement at a power supply unit. If the average power consumption of the processor does not match the average power measurement at the power supply unit, then the system may calibrate the average power consumption of the processor to match the average power measurement at the power supply unit.

Calibrating processor system power consumption

Systems and methods for adaptive modulation of MOSFET driver key parameters for improved voltage regulator efficiency and reliability in a voltage regulator may include a power stage. The power stage may include a high side switch including a high side gate, a peak voltage detection circuit, and a high side driver strength modulator circuit. The high side driver strength modulator circuit may determine a high side driver strength level. The high side driver strength modulator circuit may also connect a subset of the set of high side gate drivers to the high side gate based on the high side driver strength level. The high side driver strength modulator circuit may also disconnect a remaining subset of the set of high side gate drivers from the high side gate.

Adaptive modulation scheme of MOSFET driver key parameters for improved voltage regulator efficiency and system reliability

An memory subsystem of an information handling system includes a memory module and a controller. The memory module includes a Registering Clock Driver (RCD) configured to receive a clock signal. The RCD includes a delay setting and a clock delay circuit to provide a selectable delayed clock signal based upon the delay setting. The memory module further includes a power management integrated circuit (PMIC) with a plurality of switching regulators. The PMIC receives the delayed clock signal and clocks the switching regulators based upon the delayed clock signal. The controller sets the first delay setting.

System and method for power plane noise reduction in a memory subsystem of an information handling system

A voltage regulator includes power stages and a controller. The power stages are configured to provide power to a load in response to a pulse-width modulated (PWM) signal and to provide a body braking to the load in response to a body braking signal. The body braking is provided via a body diode of the power stage. The controller is configured to provide the PWM signals to a first power stage and a second power stage based upon a power demand of the load, to provide body braking signals to the first power stage and the second power stage in response to an over-voltage condition on the load, and to suspend the first body braking signal to the first power stage and maintain the second body braking signal to the second power stage, in response to an over-temperature condition on the first power stage.

System and method for robust body braking control to suppress transient voltage overshoot

A method and system for synchronized switching of voltage regulators in an IHS. The method includes determining, via a master voltage regulator (VR) controller, a plurality of phase shifts for a plurality of VRs configured as a master VR and at least one slave VR. The phase shifts are determined such that the VRs switch at different times from each other. A common clock signal and the phase shifts are transmitted to each of the slave VRs.

Synchronized switching of voltage regulators in an information handling system

A computer-implemented method enables determining an input power load for a multi voltage rail subsystem in an electronic device such as an information handing system. The method comprises determining a first output power value from a first voltage regulator and a second output power value from a second voltage regulator. A first input power value to the first voltage regulator is determined based at least partially on the first output power value and a second input power value to the second voltage regulator is determined based at least partially on the second output power value. An offset power value is calculated based on the first input power value and the second input power value. A total input power value is calculated based on the offset power value and a third input power value. The total input power value is transmitted to a processor.

System and method for determining power loads

A method, a power control system, and an information handling system (IHS) for operating voltage regulators (VRs) in an IHS. The method includes detecting, via a VR controller, a real time current level of a processor and receiving a first temperature value from a temperature sensor. The VR controller calculates a modified current level based on the real time current level, the first temperature value and a pre-defined temperature value and applies the modified current level to the processor.

Operating voltage regulators in an information handling system

A multiphase voltage regulator (VR) has a VR controller that performs automatic VR phase assignment and configuration for single or multi-output rails of an Information Handling System (IHS). VR power circuit has power stages selectably coupled to output voltage connection(s) or rail(s) that deliver electrical energy to information handling resource(s). VR controller is coupled to the VR power circuit and provides a first reference voltage (IREF) signal to the VR power circuit. VR controller identifies any power stages that return a load current monitor (IMON) signal that indicates that the respective power stage is coupled to the first IREF signal. VR controller regulates identified power stages of the VR power circuit during delivery of electrical power to information handling resource(s). Regulation is according to a VR configuration that is selected based on identified VR phases assigned to a first output voltage loop and associated with the first IREF signal.

Automatic detection of voltage regulator phase assignment and configuration for multi-output rails

A voltage regulation (VR) module of an Information Handling System (IHS) operates a switching direct current to direct current (DC-DC) voltage regulation (VR) power circuit in a constant current mode at a constant current level. The VR module approximates the capacitance value of the output capacitive load at the output terminal of the switching DC-DC VR power circuit based upon a time interval for output voltage to reach a threshold. The VR module then operates the switching DC-DC power circuit in constant output voltage mode using one group of VR operating settings to optimize performance for the capacitance value of the output capacitive load.

Voltage regulation auto-tuning by detecting actual total capacitance at output terminal

A voltage regulator power reporting offset system includes a monitored power reporting subsystem that determines a monitored power level, offsets the monitored power level using voltage regulator operation offset information to provide a first offset monitored power level, and reports the first offset monitored power level to voltage regulator operation components. A processor power reporting component receives the report of the first offset monitored power level from the monitored power reporting subsystem. A processor power reporting offset subsystem receives the report of the first offset monitored power level from the processor power reporting component, offsets the first offset monitored power level using the processor operation offset information to provide a second offset monitored power level that is different than the first offset monitored power level, and reports the second offset monitored power level to a processing system.

Voltage regulator power reporting offset system

A direct current (DC) power supply system performs a method of delivering electrical energy by a synchronous buck voltage regulator (VR) coupled to an information handling resource of an information handling system by switching between a high side (HS) control switch and a low side (LS) synchronous switch to regulate a direct current (DC) output voltage (VOUT) generated from an input voltage (VIN). Inductor current (IMON) values of the voltage regulator are measured during LS synchronous switch ON state. IMON values of the voltage regulator are synthesized during HS power switch ON state. A complete inductor current signal is generated that combines the measured and synthesized IMON values.

Voltage regulation based on current sensing in MOSFET drain-to-source resistance in on-state RDS(ON)

A voltage regulator for delivering power to a processor subsystem within an information handling system is disclosed. The voltage regulator includes an interface to an embedded controller for receiving a linear load line impedance and an intelligent load line controller. The intelligent load line controller may enable linear load line control, determine that a nonlinear load line condition is satisfied, and enable nonlinear load line control based on the determination that the nonlinear load line condition is satisfied.

Method and system for intelligent load line control of information handling systems

In accordance with embodiments of the present disclosure, a method may include communicating a first message to an information handling system such that receipt of the first message by the information handling system causes the information handling system to cause a power supply unit integral to the information handling system to experience a perturbation in an electrical current associated with the power supply unit and receiving a second message from a power distribution unit via an outlet integral to the power distribution unit, the second message indicative of a response to the perturbation of a measured electrical parameter of the outlet.

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Round Rock, TX, United States of America

Ralph H Johnson