Infineon Technologies Ag

Micronas Gmbh

Heine Optotechnik Gmbh & Co Kg

Ralf Schneider

Joerg Vollrath

Marcin Gnat

Manfred Pröll

Stephan Schröder

Stephan Schroeder

Norbert Wirth

Aurel Von Campenhausen

Hans Meixner

Maximilian Fleischer

Roland Pohle

Thorsten Bucksch

Elfriede Simon

Manfred Proell

Uwe Lampe

Joerg Kliewer

Herbert Benzinger

Jörg Kliewer

Georg Erhard Eggers

Oliver Heine

Dirk Schade

Anton Schneider

Thilo Schaffroth

Elsa Ploetz

Arndt Gruber

Stephan Schr&ouml;der

Bela Michael Rohrbacher

Evangelos Stavrou

Jürgen Auge

Tobias Hartner

Markus Krach

Gheorghe Dumitras

Markus Atzenbeck

Bernhard Ruf

An illumination device comprises at least one LED (), which can be connected through circuit means () to a voltage source optionally formed by a battery unit () or an accumulator unit (). Furthermore, a first contact means () is provided for connecting the battery unit () and a second contact means () for connecting the accumulator unit () to the circuit means (). A bottom unit for a battery grip () comprising a grip sleeve () in which the accumulator unit () is arranged, has a basic body () mountable at the lower end of the grip sleeve (), wherein an upper contact element () for contacting the accumulator unit () and a lower contact element () for contacting a contact element () of a charging station, to which a current is applied, are arranged in the basic body (). An electronic circuit unit () having a microprocessor () is connected between the upper and the lower contact elements (), which electronic circuit unit () is formed and configured such that it controls a charging process for charging the accumulator unit ().

Illumination device and bottom unit, especially for medical diagnostic instruments

A FET gas sensor having a relatively low operating temperature, for example, room temperature, is free from cross sensitivities from interfering gases by a preceding in-line filter. The sensor's service life is substantially stabilizable by using fabric-like activated charcoal filters which can be regenerated by a moderate temperature increase, and by limiting the diffusion of the analyte gas, which is made possible by the relatively small amount of gas detectable on the sensitive layer of the sensor. This substantially increases the service life of the filters. The gas sensor eliminates cross sensitivities to thereby increase the detection reliability thereof. Also, the gas sensor has relative long term stability and is economical to build. The gas sensor can read relatively weak signals generated by gas-sensitive layers, for example, without other stronger gas signals interfering with the weak signals.

Apparatus and method for increasing the selectivity of FET-based gas sensors

A gas sensitive field effect transistor comprises a semiconductor substrate that includes a capacitance well, and source and drain regions of a field effect transistor. A gate of the field effect transistor is separated from the semiconductor substrate by an insulator, and a gas sensitive layer separated from the gate by an air gap. The field effect transistor provides an output signal indicative of the presence of a target gas within the air gap to an amplifier, which provides an amplified output signal that is electrically coupled to the capacitance well.

Gas sensitive field-effect-transistor

A gas-sensitive field-effect transistor may be formed from a substrate with a gas-sensitive layer and a transistor processed separately and then assembled. The substrate may be patterned to form spacers by which the height of an air gap between the transistor and the sensitive layer may be adjustable to a relatively precise degree. Formation of the spacers can be achieved by patterning the substrate using material-removal techniques. The height of the spacers may be adjusted in the layer thickness of the gas-sensitive layer and for the transistor fabricated using a CMOS process. Suitable techniques for producing recesses between the spacers include, for example, polishing, cutting, sandblasting, lithographic dry etching, or wet-chemical etching. Suitable materials for the substrate may include, for example, glass, ceramic, aluminum oxide, silicon, or a dimensionally stable polymer. Following preparation of the substrate and the transistor, the two elements of the transistor are joined, for example, using flip-chip methods or adhesive-bonding technology.

Gas-sensitive field-effect transistor with air gap

In a method for initializing at least one electronic circuit unit of an electric circuit, a supply voltage is applied to a power supply connection unit of the electronic circuit in order to supply electrical power to the electronic circuit unit. A reference signal is applied to the electronic circuit unit via a reference signal connection unit. A blocking unit connected to the reference signal connection unit blocks the electronic circuit unit until the reference signal is supplied. An input signal to the electronic circuit unit is supplied via an input signal connection unit of the electronic circuit and an output signal is output by an output signal connection unit of the electronic circuit. The output signal is dependent on the input signal and the reference signal supplied to the electronic circuit unit.

Method for initialization of electronic circuit units, and electric circuit

A field effect semiconductor comprises a semiconductor layer having a surface, a first and a second semiconductor region in the semiconductor layer, which are arranged next to one another at the surface of the semiconductor layer, an insulating layer between the first semiconductor region and the second semiconductor region, a semiconductor strip on the surface of the semiconductor layer, which semiconductor strip overlaps the first semiconductor region and the second semiconductor region and adjoins these. A gate overlaps the semiconductor strip at least in the region of the insulating layer. A gate dielectric insulates the gate from the semiconductor strip the first semiconductor region and the second semiconductor region. The semiconductor strip and the gate being formed such that the semiconductor strip is electrically insulating at a first predetermined gate voltage and is electrically conductive at a second predetermined gate voltagero.

Field effect semiconductor switch and method for fabricating it

An integrated circuit includes a current generator circuit with a first input terminal for applying a reference voltage and a second input terminal for applying an input voltage, which is generated internally from an externally applied supply voltage by a voltage generator circuit. The current generator circuit is connected to an output terminal via an interconnect. A first current flows on the interconnect in a test operating state of the integrated circuit. The current generator circuit generates a first partial current in a first test cycle of a test operating state and a second partial current in a subsequent second test cycle. The partial currents are each superposed on the first current on the interconnect. Consequently, three currents occur at the output terminal during the test operating state. The internally generated input voltage of the current generator circuit is determined from the three currents and the reference voltage.

Integrated circuit for determining a voltage

An integrated semiconductor memory includes word lines connected to a first voltage potential via a respective first controllable switch and a respective third controllable switch and to a second voltage potential via a respective second controllable switch. In order to test whether one of the word lines is connected to the first voltage potential via its respective first and third controllable switches, the one of the word lines is connected to a comparator circuit via the respective second controllable switch and a driver line. After the respective first and third controllable switches have been controlled into the on state, in a test operating state of the integrated semiconductor memory, the respective second controllable switch is controlled into the on state and a potential state on the word line is evaluated by the comparator circuit. The result of the evaluation is fed to an external data terminal by an evaluation signal.

Integrated semiconduct memory with test circuit

Integrated semiconductor circuits, in particular, dynamic random access memories include a multiplicity of generator circuits for generating internal voltage levels from an externally applied supply voltage. During testing, the internal voltage levels are altered by the output voltage generated at the output of the generator circuit being adapted to an externally applied test voltage. If the test voltage is outside a tolerance range, the semiconductor circuit maybe destroyed. A protection circuit connected in parallel with the generator circuit limits the output voltage.

Integrated semiconductor circuit and method for testing the same

An integrated semiconductor memory, which can be operated in a normal operating state and a test operating state, includes a current pulse circuit with an input terminal for applying an input signal. The current pulse circuit is connected to an output terminal via an interconnect for carrying a current. In the test operating state, the current pulse circuit generates at least one first current pulse with a first, predetermined time duration in a first test cycle and at least one second current pulse with a second, unknown time duration in a subsequent second test cycle. In addition to a first current flowing on the interconnect in the normal operating state, a second current flows on the interconnect during the first test cycle and a third current flows during the second test cycle in the test operating state.

Integrated circuit

An integrated circuit includes a circuit component, a first control circuit and a switchable resistance network. An input voltage is fed to the circuit component on the input side. A control signal generated by the first control circuit is fed to the control terminal of the circuit component. With the switchable resistance network, the first resistance or the second resistance is connected between an output terminal of the circuit component and the output terminal of the integrated circuit to generate a voltage drop between the input side and the output terminal of the circuit component. The integrated circuit makes it possible to generate a current at the output terminal of the circuit component in a manner dependent on the control signal and the voltage dropped between the input side and the output terminal of the circuit component. Families of characteristic curves of transistors of an integrated circuit are determined by the integrated circuit.

An integrated circuit includes an input terminal (IN) for application of a supply voltage (Vext) and an output terminal (A) for generation of an output voltage (Vout). A first branch including a first controllable resistance (T) and a second branch including a charge pump () and a second controllable resistance (T) are connected between the input terminal (IN) and the output terminal (A). A control circuit () alters the resistance values of the first and second controllable resistances (T, T) in a manner dependent on a ratio of an actual value (Vout) of the output voltage to a desired value (VSout) of the output voltage and a ratio of an actual value (Vext) of the supply voltage to a desired value (VSext) of the supply voltage. As a result, the output voltage (Vout) can be stabilized to the desired value (VSout) virtually independently of fluctuations of the supply voltage.

Integrated circuit for stabilizing a voltage

The present invention provides an apparatus for signaling that a predetermined time value has elapsed, having a device for acquiring and storing the amplitude value of a clock signal at an acquisition instant in the temporal profile of the clock signal. A device is provided for continuously comparing the acquired and stored amplitude value of the clock signal with an instantaneous amplitude value of the clock signal and for outputting a comparison signal which has a first logic state if the instantaneous amplitude value of the clock signal is less than the stored amplitude value and has a second logic state if the instantaneous amplitude value of the clock signal is greater than the stored amplitude value. A device is also provided for counting the number of logic states of the comparison signal which occur after the acquisition instant, and for signaling that the predetermined time value has elapsed if the counted number of logic states is equal to a predetermined number of logic states which corresponds temporally to the predetermined time value.

Apparatus for signaling that a predetermined time value has elapsed

The invention relates to a RAM store having a shared SA structure, in which sense amplifiers (SA) arranged in SA strips () between two respective adjacent cell blocks are used by a plurality of bit line pairs () from the adjacent cell blocks and the bit line pairs () have respective charge equalization circuits individually associated with them for the purpose of performing charge equalization between the bit line halves of the bit line pairs () in a precharge phase, where a shorting transistor () is provided which, when prompted by a control signal (EQLx), connects the bit line halves (BLT, BLC) of the bit line pairs () which are in the precharge phase to one another. The shorting transistor () is arranged in or on the respective sense amplifier (SA) jointly for all bit line pairs () which can be connected to a repetitive sense amplifier (SA), and it can be switched by a separate shorting control signal (EQLx) via a dedicated control line ().

RAM store and control method therefor

An integrated memory contains a memory cell array, which has word lines and bit lines, and a read/write amplifier, which is connected to the bit lines for the assessing and amplifying data signals. A voltage generator circuit generates a voltage supply for application to the read/write amplifier. A potential difference is applied to the read/write amplifier using different supply potentials. The voltage generator circuit increases the potential difference applied to the read/write amplifier for a limited period of time during an assessment and amplification operation of the read/write amplifier. Charge-dependent control is implemented in the voltage generator circuit. An assessment and amplification operation can be carried out at a comparatively high switching speed and a low power consumption is possible.

Growing community of inventors

Munich, Germany

Ralf Schneider