Infineon Technologies Ag

Intel Mobile Communications Gmbh

Intel Deutschland Gmbh

Ralf Plieninger

Thorsten Meyer

Jens G Pohl

Recai Sezi

Markus Brunnbauer

Klaus Pressel

Stephan Bradl

Grit Sommer

Stephan Brandl

A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.

Workpiece with semiconductor chips, semiconductor device and method for producing a workpiece with semiconductor chips

A semiconductor device is disclosed. One embodiment provides a semiconductor chip. The semiconductor chip includes a first electrode of a capacitor. An insulating layer is arranged on top of the first electrode. A second electrode of the capacitor is applied over the insulating layer, wherein the second electrode is made of a conductive layer arranged over the semiconductor chip.

Semiconductor device

Structure for electrostatic discharge in embedded wafer level packages

A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also includes an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.

Workpiece with semiconductor chips and molding, semiconductor device and method for producing a workpiece with semiconductors chips

Growing community of inventors

Poing, Germany

Ralf Plieninger