Telefonaktiebolaget Lm Ericsson (publ)

Ralf Kukla

Seyed-Hami Nourbakhsh

Michael Niegel

Fredrik Bengt Ovesj&ouml;

Gerd Mörsberger

Georg Spörlein

Edmund Goetz

Stefan Schütz

Gerhard Goedert

Joakim Karl Olof

A method for processing a bit sequence in a digital communication system, includes the steps of (a) storing the bits of said bit sequence at locations of a memory means indicated by a first interleaving scheme, (b) converting output bit positions into input bit positions according to an inverse of a second interleaving scheme, (c) reading out bits stored at locations of said memory means corresponding to said input bit positions, thereby generating an interleaved sequence which is interleaved according to said first and said second interleaving schemes, and (d) processing said interleaved sequence according to further physical processing steps. Alternatively, step (a) may include storing the bits of said input bit sequence in a memory means and step (b) may include converting output bit positions into input bit positions according to the inverse of a sequential application of a first interleaving scheme and a second interleaving scheme.

Interleaving for mobile communications

This invention relates to a method for interleaving, according to an interleaving scheme, an input sequence comprising K bits into an interleaved sequence, comprising the steps of (a) storing the input sequence in a first memory means, (b) generating first indices of N succeeding bits of the interleaved sequence, wherein 1 m(F) N m(F) K, (c) converting. according to an inverse of said interleaving scheme, said first indices into second indices indicative of the positions where said N succeeding bits of the interleaved sequence are stored in said first memory means, and (d) reading out said N succeeding bits from said positions in said first memory means, thereby generating at least part of said interleaved sequence.

Speed and memory optimized interleaving

A Calculated Transport Format Combination (CTFC) provides efficient signalling of transport format combinations to be assigned TFCI values. A sequence of CTFCs is signalled from higher layers ( ) to Node B ( ) and the user equipment (UE) ( ), where each CTFC in order is allocated a TFCI value. From the CTFC both Node B and the user equipment (UE) can determine the exact transport format combinations the TFCI values (used to communicate between Node B and UE) represent. The sequence of CTFC values includes only CTFC values for valid combinations of transport formats.

Transport format combination indicator mapping for telecommunications

A sequence generator for generating sequences of binary or discrete values may be flexibly adjusted to requirements. Shift register memory locations may be selected as feed-back locations for generating a feed-back signal. Further, shift register memory locations may be selected as feed-in locations for receiving the feed-back signal. A plurality of control memory locations store a control bit sequence for controlling the sequence generator. The sequence generator may be used as a longcode and/or shortcode generator in a CDMA-telecommunications system.

Sequence generator

Circuitry combines a plurality of digital communication channels in a telecommunication system with reduced hardware requirements. The circuitry accumulates samples of the input communication channels in a register using an adder. The bit width of the connection lines between the register and the adder may be selected considering the bit width and number of input communication channels, such that minimal bit widths are provided.

Combiner

The present invention relates to spreading data of a plurality of digital communication channels having different data rates with code sequences having different lengths. The inventive circuit allows to use a single hardware unit for spreading communication channels having different data rates, e.g. in a CDMA telecommunications system. This is achieved by processing either a single symbol and a corresponding long code in appropriate storage means for a channel with a lowest rate or to process a plurality of symbols and corresponding shorter code sequences of communication channels having higher data rates. Thus, a joint chip rate after spreading is obtained using a single hardware structure.

Spreader for multiple data rates

Method and apparatus for processing a plurality of data channels, e.g., of a CDMA telecommunications system, using a pipeline structure. The invention allows to process channels in an interleaved fashion, where each of a plurality of pipeline stages may access channel specific data using channel addresses transmitted via addressing means. In order to synchronize the transmission of processing results and addresses associated with the data channels, the addressing means comprises a plurality of delay units. With the invention power control and measurement operations for a plurality of channels may be facilitated.

Growing community of inventors

Nürnberg, Germany

Ralf Kukla