Qualcomm Incorporated

Rakesh Kumar Kinger

Rahul Gulati

Srinivas Patil

Roberto Averbuj

Pranjal Bhuyan

Lavakumar Ranganathan

Nishi Bhushan Singh

Arvind Jain

Lesly Endrinal

Joseph Fang

Chia-Ying Chen

A self-test controller includes a memory configured to store a test patterns, configuration registers, and a memory data component. The test patterns are encoded in the memory using various techniques in order to save storage space. By using the configuration parameters, the memory data component is configured to decode the test patterns and perform multiple built-in self-test on a multitude of test cores. The described techniques allow for built-in self-test to be performed dynamically while utilizing less space in the memory.

In-field self-test controller for safety critical automotive use cases

The present disclosure provide techniques for semiconductor testing, and more particularly, to systems and methods for laser-based fault isolation and design for testability (DFT) diagnosis techniques. In one embodiment, an integrated chip (IC) testing apparatus, includes an input pin; a decompressor connected to the input pin; a plurality of scan chains, each scan chain of the plurality of scan chains comprising a plurality of scan cells; a plurality of scan chain control elements, each scan chain control element of the plurality of scan chain control elements being connected between the decompressor and a respective scan chain of the plurality of scan chains, wherein each scan chain control element is configured to enable or disable test data from flowing from the compressor to the respective scan chain; a compressor connected to an output of each scan chain of the plurality of scan chains; and an output pin connected to the compressor.

Laser-based integrated circuit testing techniques

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San Diego, CA, United States of America

Rakesh Kumar Kinger