Esilicon Corporation

Rakesh Chadha

Prasad Subramaniam

Ferran Martorell

Hao Nham

In one aspect, a method for providing design point recommendations for an integrated circuit (IC) design is disclosed. The method comprises receiving an IC design along with a reference PPA (power, performance, area) metric at a reference design point, and a target PPA metric. The method also comprises estimating trial PPA metrics for the IC design at multiple design points, wherein estimating trial PPA metric at each design point includes accessing a PPA database containing PPA metrics for multiple test components, determining scale factors from the reference design point to the trial design point for test components equivalent to components of the IC design, and applying the scale factors to the reference PPA metric to determine the trial PPA metric for the trial design point. The method further comprises recommending a trial design point based on the estimated trial PPA metric and the received target PPA metric.

Integrated circuit design scaling for recommending design point

Scaling logic components of integrated circuit design

Scaling of integrated circuit design including high-level logic components

Scaling of integrated circuit design including logic and memory components

Integrated circuit design optimization

Scaling memory components of integrated circuit design

Growing community of inventors

Berkeley Heights, NJ, United States of America

Rakesh Chadha