Cypress Semiconductor Corporation

Rajiv Nema

Anup Nayak

Timothy M Lacey

Navaz M Lulla

Ramin Ighani

Han-Kim Nguyen

Anup K Nayak

Aaron S Yip

An apparatus comprising one or more configuration blocks. The configuration blocks (i) may comprise a number of configuration elements and (ii) may be configured to initiate reading or writing of the configuration elements in response to a control input.

PLD configuration architecture

A programmable circuit apparatus having a programmable circuit and an input/output circuit with a first terminal is provided. The programmable circuit apparatus includes a programming circuit, with a bus junction, for programming the programmable circuit. The programmable circuit apparatus further includes an isolation circuit having an isolation input, coupled to the first terminal, and an isolation output, coupled to the bus junction of the programming circuit. The isolation circuit further has an isolation control gate which can receive a control signal and in response to that signal, the control gate controllably couples the isolation input to the isolation output. The programmable circuit apparatus also includes an apparatus for testing the routing, the programming circuitry, and the programmable circuit with a minimal impact on the performance of the programmable circuit. The programmable circuit apparatus also has the ability to program three or more antifuses or other programmable elements simultaneously.

Architecture for FPGAs

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Fremont, CA, United States of America

Rajiv Nema